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authorBen Dooks <ben@simtec.co.uk>2009-08-18 14:11:16 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-08-18 16:31:13 -0700
commitb8978784544e8b4e8fbacb558df8580957d4f8a5 (patch)
treeecc74e896383a4203d0bdd679161bd419f4b430e /drivers/spi/spi_s3c24xx.c
parentb2503a9408e44eb0531adc3436c513ea70f91c42 (diff)
downloadblackbird-op-linux-b8978784544e8b4e8fbacb558df8580957d4f8a5.tar.gz
blackbird-op-linux-b8978784544e8b4e8fbacb558df8580957d4f8a5.zip
spi_s3c24xx: fix clock rate calculation
Currently the clock rate calculation may round as pleased, which means that it is possible that we will round down and end up with a faster clock rate than intended. Change the calculation to use DIV_ROUND_UP() to ensure that we end up with a clock rate either the same as or lower than the user requested one. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/spi/spi_s3c24xx.c')
-rw-r--r--drivers/spi/spi_s3c24xx.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index e0d44af4745a..590be85c8f3d 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -111,6 +111,7 @@ static int s3c24xx_spi_setupxfer(struct spi_device *spi,
unsigned int bpw;
unsigned int hz;
unsigned int div;
+ unsigned long clk;
bpw = t ? t->bits_per_word : spi->bits_per_word;
hz = t ? t->speed_hz : spi->max_speed_hz;
@@ -120,20 +121,16 @@ static int s3c24xx_spi_setupxfer(struct spi_device *spi,
return -EINVAL;
}
- div = clk_get_rate(hw->clk) / hz;
-
- /* is clk = pclk / (2 * (pre+1)), or is it
- * clk = (pclk * 2) / ( pre + 1) */
-
- div /= 2;
-
- if (div > 0)
- div -= 1;
+ clk = clk_get_rate(hw->clk);
+ div = DIV_ROUND_UP(clk, hz * 2) - 1;
if (div > 255)
div = 255;
- dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", div, hz);
+ dev_dbg(&spi->dev, "setting pre-scaler to %d (wanted %d, got %ld)\n",
+ div, hz, clk / (2 * (div + 1)));
+
+
writeb(div, hw->regs + S3C2410_SPPRE);
spin_lock(&hw->bitbang.lock);
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