diff options
author | Jing Huang <huangj@brocade.com> | 2010-10-18 17:12:29 -0700 |
---|---|---|
committer | James Bottomley <James.Bottomley@suse.de> | 2010-10-25 16:18:20 -0500 |
commit | 5344026065f79b102fcc44bc6332f856a111962a (patch) | |
tree | c28f91eb4593e3e89b030a65a4fd71b8b43cc1f1 /drivers/scsi/bfa/bfa_ioc_ct.c | |
parent | ba816ea8e2eacbf3d198ad1859f413c2d6213434 (diff) | |
download | blackbird-op-linux-5344026065f79b102fcc44bc6332f856a111962a.tar.gz blackbird-op-linux-5344026065f79b102fcc44bc6332f856a111962a.zip |
[SCSI] bfa: remove os wrapper functions and macros
This patch replaces register access functions and macros with the the ones
provided by linux.
Signed-off-by: Jing Huang <huangj@brocade.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/bfa/bfa_ioc_ct.c')
-rw-r--r-- | drivers/scsi/bfa/bfa_ioc_ct.c | 119 |
1 files changed, 57 insertions, 62 deletions
diff --git a/drivers/scsi/bfa/bfa_ioc_ct.c b/drivers/scsi/bfa/bfa_ioc_ct.c index 5008afe96c99..c852d985e198 100644 --- a/drivers/scsi/bfa/bfa_ioc_ct.c +++ b/drivers/scsi/bfa/bfa_ioc_ct.c @@ -76,19 +76,19 @@ bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc) return BFA_TRUE; bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg); - usecnt = bfa_reg_read(ioc->ioc_regs.ioc_usage_reg); + usecnt = readl(ioc->ioc_regs.ioc_usage_reg); /** * If usage count is 0, always return TRUE. */ if (usecnt == 0) { - bfa_reg_write(ioc->ioc_regs.ioc_usage_reg, 1); + writel(1, ioc->ioc_regs.ioc_usage_reg); bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg); bfa_trc(ioc, usecnt); return BFA_TRUE; } - ioc_fwstate = bfa_reg_read(ioc->ioc_regs.ioc_fwstate); + ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate); bfa_trc(ioc, ioc_fwstate); /** @@ -110,7 +110,7 @@ bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc) * Same firmware version. Increment the reference count. */ usecnt++; - bfa_reg_write(ioc->ioc_regs.ioc_usage_reg, usecnt); + writel(usecnt, ioc->ioc_regs.ioc_usage_reg); bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg); bfa_trc(ioc, usecnt); return BFA_TRUE; @@ -138,11 +138,11 @@ bfa_ioc_ct_firmware_unlock(struct bfa_ioc_s *ioc) * decrement usage count */ bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg); - usecnt = bfa_reg_read(ioc->ioc_regs.ioc_usage_reg); + usecnt = readl(ioc->ioc_regs.ioc_usage_reg); bfa_assert(usecnt > 0); usecnt--; - bfa_reg_write(ioc->ioc_regs.ioc_usage_reg, usecnt); + writel(usecnt, ioc->ioc_regs.ioc_usage_reg); bfa_trc(ioc, usecnt); bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg); @@ -155,12 +155,12 @@ static void bfa_ioc_ct_notify_hbfail(struct bfa_ioc_s *ioc) { if (ioc->cna) { - bfa_reg_write(ioc->ioc_regs.ll_halt, __FW_INIT_HALT_P); + writel(__FW_INIT_HALT_P, ioc->ioc_regs.ll_halt); /* Wait for halt to take effect */ - bfa_reg_read(ioc->ioc_regs.ll_halt); + readl(ioc->ioc_regs.ll_halt); } else { - bfa_reg_write(ioc->ioc_regs.err_set, __PSS_ERR_STATUS_SET); - bfa_reg_read(ioc->ioc_regs.err_set); + writel(__PSS_ERR_STATUS_SET, ioc->ioc_regs.err_set); + readl(ioc->ioc_regs.err_set); } } @@ -197,7 +197,7 @@ static struct { u32 hfn, lpu; } iocreg_mbcmd_p1[] = { static void bfa_ioc_ct_reg_init(struct bfa_ioc_s *ioc) { - bfa_os_addr_t rb; + void __iomem *rb; int pcifn = bfa_ioc_pcifn(ioc); rb = bfa_ioc_bar0(ioc); @@ -256,13 +256,13 @@ bfa_ioc_ct_reg_init(struct bfa_ioc_s *ioc) static void bfa_ioc_ct_map_port(struct bfa_ioc_s *ioc) { - bfa_os_addr_t rb = ioc->pcidev.pci_bar_kva; + void __iomem *rb = ioc->pcidev.pci_bar_kva; u32 r32; /** * For catapult, base port id on personality register and IOC type */ - r32 = bfa_reg_read(rb + FNC_PERS_REG); + r32 = readl(rb + FNC_PERS_REG); r32 >>= FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc)); ioc->port_id = (r32 & __F0_PORT_MAP_MK) >> __F0_PORT_MAP_SH; @@ -276,10 +276,10 @@ bfa_ioc_ct_map_port(struct bfa_ioc_s *ioc) static void bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix) { - bfa_os_addr_t rb = ioc->pcidev.pci_bar_kva; + void __iomem *rb = ioc->pcidev.pci_bar_kva; u32 r32, mode; - r32 = bfa_reg_read(rb + FNC_PERS_REG); + r32 = readl(rb + FNC_PERS_REG); bfa_trc(ioc, r32); mode = (r32 >> FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc))) & @@ -300,7 +300,7 @@ bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix) r32 |= (mode << FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc))); bfa_trc(ioc, r32); - bfa_reg_write(rb + FNC_PERS_REG, r32); + writel(r32, rb + FNC_PERS_REG); } /** @@ -312,7 +312,7 @@ bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc) if (ioc->cna) { bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg); - bfa_reg_write(ioc->ioc_regs.ioc_usage_reg, 0); + writel(0, ioc->ioc_regs.ioc_usage_reg); bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg); } @@ -321,7 +321,7 @@ bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc) * before we clear it. If it is not locked, writing 1 * will lock it instead of clearing it. */ - bfa_reg_read(ioc->ioc_regs.ioc_sem_reg); + readl(ioc->ioc_regs.ioc_sem_reg); bfa_ioc_hw_sem_release(ioc); } @@ -331,17 +331,17 @@ bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc) * Check the firmware state to know if pll_init has been completed already */ bfa_boolean_t -bfa_ioc_ct_pll_init_complete(bfa_os_addr_t rb) +bfa_ioc_ct_pll_init_complete(void __iomem *rb) { - if ((bfa_reg_read(rb + BFA_IOC0_STATE_REG) == BFI_IOC_OP) || - (bfa_reg_read(rb + BFA_IOC1_STATE_REG) == BFI_IOC_OP)) + if ((readl(rb + BFA_IOC0_STATE_REG) == BFI_IOC_OP) || + (readl(rb + BFA_IOC1_STATE_REG) == BFI_IOC_OP)) return BFA_TRUE; return BFA_FALSE; } bfa_status_t -bfa_ioc_ct_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode) +bfa_ioc_ct_pll_init(void __iomem *rb, bfa_boolean_t fcmode) { u32 pll_sclk, pll_fclk, r32; @@ -354,56 +354,51 @@ bfa_ioc_ct_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode) __APP_PLL_425_JITLMT0_1(3U) | __APP_PLL_425_CNTLMT0_1(1U); if (fcmode) { - bfa_reg_write((rb + OP_MODE), 0); - bfa_reg_write((rb + ETH_MAC_SER_REG), - __APP_EMS_CMLCKSEL | - __APP_EMS_REFCKBUFEN2 | - __APP_EMS_CHANNEL_SEL); + writel(0, (rb + OP_MODE)); + writel(__APP_EMS_CMLCKSEL | __APP_EMS_REFCKBUFEN2 | + __APP_EMS_CHANNEL_SEL, (rb + ETH_MAC_SER_REG)); } else { - bfa_reg_write((rb + OP_MODE), __GLOBAL_FCOE_MODE); - bfa_reg_write((rb + ETH_MAC_SER_REG), - __APP_EMS_REFCKBUFEN1); + writel(__GLOBAL_FCOE_MODE, (rb + OP_MODE)); + writel(__APP_EMS_REFCKBUFEN1, (rb + ETH_MAC_SER_REG)); } - bfa_reg_write((rb + BFA_IOC0_STATE_REG), BFI_IOC_UNINIT); - bfa_reg_write((rb + BFA_IOC1_STATE_REG), BFI_IOC_UNINIT); - bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); - bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); - bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); - bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); - bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); - bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); - bfa_reg_write(rb + APP_PLL_312_CTL_REG, pll_sclk | - __APP_PLL_312_LOGIC_SOFT_RESET); - bfa_reg_write(rb + APP_PLL_425_CTL_REG, pll_fclk | - __APP_PLL_425_LOGIC_SOFT_RESET); - bfa_reg_write(rb + APP_PLL_312_CTL_REG, pll_sclk | - __APP_PLL_312_LOGIC_SOFT_RESET | __APP_PLL_312_ENABLE); - bfa_reg_write(rb + APP_PLL_425_CTL_REG, pll_fclk | - __APP_PLL_425_LOGIC_SOFT_RESET | __APP_PLL_425_ENABLE); - bfa_reg_read(rb + HOSTFN0_INT_MSK); + writel(BFI_IOC_UNINIT, (rb + BFA_IOC0_STATE_REG)); + writel(BFI_IOC_UNINIT, (rb + BFA_IOC1_STATE_REG)); + writel(0xffffffffU, (rb + HOSTFN0_INT_MSK)); + writel(0xffffffffU, (rb + HOSTFN1_INT_MSK)); + writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS)); + writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS)); + writel(0xffffffffU, (rb + HOSTFN0_INT_MSK)); + writel(0xffffffffU, (rb + HOSTFN1_INT_MSK)); + writel(pll_sclk | __APP_PLL_312_LOGIC_SOFT_RESET, + rb + APP_PLL_312_CTL_REG); + writel(pll_fclk | __APP_PLL_425_LOGIC_SOFT_RESET, + rb + APP_PLL_425_CTL_REG); + writel(pll_sclk | __APP_PLL_312_LOGIC_SOFT_RESET | __APP_PLL_312_ENABLE, + rb + APP_PLL_312_CTL_REG); + writel(pll_fclk | __APP_PLL_425_LOGIC_SOFT_RESET | __APP_PLL_425_ENABLE, + rb + APP_PLL_425_CTL_REG); + readl(rb + HOSTFN0_INT_MSK); udelay(2000); - bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); - bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); - bfa_reg_write(rb + APP_PLL_312_CTL_REG, pll_sclk | - __APP_PLL_312_ENABLE); - bfa_reg_write(rb + APP_PLL_425_CTL_REG, pll_fclk | - __APP_PLL_425_ENABLE); + writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS)); + writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS)); + writel(pll_sclk | __APP_PLL_312_ENABLE, rb + APP_PLL_312_CTL_REG); + writel(pll_fclk | __APP_PLL_425_ENABLE, rb + APP_PLL_425_CTL_REG); if (!fcmode) { - bfa_reg_write((rb + PMM_1T_RESET_REG_P0), __PMM_1T_RESET_P); - bfa_reg_write((rb + PMM_1T_RESET_REG_P1), __PMM_1T_RESET_P); + writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P0)); + writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P1)); } - r32 = bfa_reg_read((rb + PSS_CTL_REG)); + r32 = readl((rb + PSS_CTL_REG)); r32 &= ~__PSS_LMEM_RESET; - bfa_reg_write((rb + PSS_CTL_REG), r32); + writel(r32, (rb + PSS_CTL_REG)); udelay(1000); if (!fcmode) { - bfa_reg_write((rb + PMM_1T_RESET_REG_P0), 0); - bfa_reg_write((rb + PMM_1T_RESET_REG_P1), 0); + writel(0, (rb + PMM_1T_RESET_REG_P0)); + writel(0, (rb + PMM_1T_RESET_REG_P1)); } - bfa_reg_write((rb + MBIST_CTL_REG), __EDRAM_BISTR_START); + writel(__EDRAM_BISTR_START, (rb + MBIST_CTL_REG)); udelay(1000); - r32 = bfa_reg_read((rb + MBIST_STAT_REG)); - bfa_reg_write((rb + MBIST_CTL_REG), 0); + r32 = readl((rb + MBIST_STAT_REG)); + writel(0, (rb + MBIST_CTL_REG)); return BFA_STATUS_OK; } |