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| author | Tejun Heo <htejun@gmail.com> | 2006-05-15 21:03:50 +0900 |
|---|---|---|
| committer | Tejun Heo <htejun@gmail.com> | 2006-05-15 21:03:50 +0900 |
| commit | dd410ff12925fc49df3174b18e43598b2b2b621f (patch) | |
| tree | 782f1127a074fbb70e90ac46b5e97e42aceddc9d /drivers/scsi/ahci.c | |
| parent | a6e6ce8e8dc907a2cf2b994b0ea4099423f046bf (diff) | |
| download | blackbird-op-linux-dd410ff12925fc49df3174b18e43598b2b2b621f.tar.gz blackbird-op-linux-dd410ff12925fc49df3174b18e43598b2b2b621f.zip | |
[PATCH] ahci: clean up AHCI constants in preparation for NCQ
* Rename CMD_TBL_HDR to CMD_TBL_HDR_SZ as it's size not offset.
* Define MAX_CMDS and CMD_SZ and use them in calculation of other
constants.
* Define CMD_TBL_AR_SZ as product of CMD_TBL_SZ and MAX_CMDS, and use
it when calculating PRIV_DMA_SZ.
* CMD_SLOT_SZ is also dependent on MAX_CMDS but hasn't been changed
because I didn't want to change the value used by the original code
(32 commands). Later NCQ change will bump MAX_CMDS to 32 anyway and
the hard coded 32 can be changed to MAX_CMDS then.
* Reorder HOST_CAP_* flags.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Diffstat (limited to 'drivers/scsi/ahci.c')
| -rw-r--r-- | drivers/scsi/ahci.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c index 35487e30b0ff..b25373f530ac 100644 --- a/drivers/scsi/ahci.c +++ b/drivers/scsi/ahci.c @@ -56,12 +56,15 @@ enum { AHCI_MAX_SG = 168, /* hardware max is 64K */ AHCI_DMA_BOUNDARY = 0xffffffff, AHCI_USE_CLUSTERING = 0, - AHCI_CMD_SLOT_SZ = 32 * 32, + AHCI_MAX_CMDS = 1, + AHCI_CMD_SZ = 32, + AHCI_CMD_SLOT_SZ = 32 * AHCI_CMD_SZ, AHCI_RX_FIS_SZ = 256, - AHCI_CMD_TBL_HDR = 0x80, AHCI_CMD_TBL_CDB = 0x40, - AHCI_CMD_TBL_SZ = AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16), - AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ + + AHCI_CMD_TBL_HDR_SZ = 0x80, + AHCI_CMD_TBL_SZ = AHCI_CMD_TBL_HDR_SZ + (AHCI_MAX_SG * 16), + AHCI_CMD_TBL_AR_SZ = AHCI_CMD_TBL_SZ * AHCI_MAX_CMDS, + AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_AR_SZ + AHCI_RX_FIS_SZ, AHCI_IRQ_ON_SG = (1 << 31), AHCI_CMD_ATAPI = (1 << 5), @@ -89,8 +92,8 @@ enum { HOST_AHCI_EN = (1 << 31), /* AHCI enabled */ /* HOST_CAP bits */ - HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */ HOST_CAP_CLO = (1 << 24), /* Command List Override support */ + HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */ /* registers for each SATA port */ PORT_LST_ADDR = 0x00, /* command list DMA addr */ @@ -398,7 +401,7 @@ static int ahci_port_start(struct ata_port *ap) pp->cmd_tbl = mem; pp->cmd_tbl_dma = mem_dma; - pp->cmd_tbl_sg = mem + AHCI_CMD_TBL_HDR; + pp->cmd_tbl_sg = mem + AHCI_CMD_TBL_HDR_SZ; ap->private_data = pp; |
