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| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2013-05-08 23:15:50 +0000 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2013-06-05 17:17:19 +0900 |
| commit | 3c5886d145a1bd46601313c735de214bc874aebc (patch) | |
| tree | 7e62aa24051d8fd5ad304df367e0d988b7dc34d3 /drivers/pinctrl | |
| parent | 2d7cd3987056e958af32962d74441dddd70cb8f6 (diff) | |
| download | blackbird-op-linux-3c5886d145a1bd46601313c735de214bc874aebc.tar.gz blackbird-op-linux-3c5886d145a1bd46601313c735de214bc874aebc.zip | |
sh-pfc: r8a7778: add Ether pin groups
Add Ether RMII/LINK/MAGIC pin groups to R8A7778 PFC driver.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c index e518c33dd21f..bc20083bf53a 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c @@ -1323,6 +1323,22 @@ static struct sh_pfc_pin pinmux_pins[] = { arg5##_MARK, arg6##_MARK, \ arg7##_MARK, arg8##_MARK, } +/* - Ether ------------------------------------------------------------------ */ +SH_PFC_PINS(ether_rmii, RCAR_GP_PIN(4, 10), RCAR_GP_PIN(4, 11), + RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 9), + RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), + RCAR_GP_PIN(4, 12), RCAR_GP_PIN(4, 14), + RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17)); +static const unsigned int ether_rmii_mux[] = { + ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REF_CLK_MARK, + ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK, + ETH_MDIO_MARK, ETH_MDC_MARK, +}; +SH_PFC_PINS(ether_link, RCAR_GP_PIN(4, 19)); +SH_PFC_MUX1(ether_link, ETH_LINK); +SH_PFC_PINS(ether_magic, RCAR_GP_PIN(4, 20)); +SH_PFC_MUX1(ether_magic, ETH_MAGIC); + /* - SCIF macro ------------------------------------------------------------- */ #define SCIF_PFC_PIN(name, args...) SH_PFC_PINS(name, args) #define SCIF_PFC_DAT(name, tx, rx) SH_PFC_MUX2(name, tx, rx) @@ -1554,6 +1570,9 @@ VIN_PFC_PINS(vin1_sync, RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 22)); VIN_PFC_SYNC(vin1_sync, VI1_HSYNC, VI1_VSYNC); static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(ether_rmii), + SH_PFC_PIN_GROUP(ether_link), + SH_PFC_PIN_GROUP(ether_magic), SH_PFC_PIN_GROUP(hscif0_data_a), SH_PFC_PIN_GROUP(hscif0_data_b), SH_PFC_PIN_GROUP(hscif0_ctrl_a), @@ -1634,6 +1653,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(vin1_sync), }; +static const char * const ether_groups[] = { + "ether_rmii", + "ether_link", + "ether_magic", +}; + static const char * const hscif0_groups[] = { "hscif0_data_a", "hscif0_data_b", @@ -1762,6 +1787,7 @@ static const char * const vin1_groups[] = { }; static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(ether), SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), SH_PFC_FUNCTION(scif_clk), |
