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authorJarod Wilson <jwilson@redhat.com>2008-03-07 01:43:31 -0500
committerStefan Richter <stefanr@s5r6.in-berlin.de>2008-04-18 17:55:33 +0200
commit17cff9ff871bb5081cade4f99a9e9382b9f1c01c (patch)
treef6bd2d184722b5796c1ada8a2b7790d615a6f194 /drivers/pcmcia/yenta_socket.h
parenta5fd9ec7a29202f388fc011a11cfb0101d9f9a34 (diff)
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firewire: fw-sbp2: set dual-phase cycle_limit
Try to write dual-phase retry protocol limits to BUSY_TIMEOUT register. - The dual-phase retry protocol is optional to implement, and if not supported, writes to the dual-phase portion of the register will be ignored. We try to write the original 1394-1995 default here. - In the case of devices that are also SBP-3-compliant, all writes are ignored, as the register is read-only, but contains single-phase retry of 15, which is what we're trying to set for all SBP-2 device anyway, so this write attempt is safe and yields more consistent behavior for all devices. See section 8.3.2.3.5 of the 1394-1995 spec, section 6.2 of the SBP-2 spec, and section 6.4 of the SBP-3 spec for further details. Signed-off-by: Jarod Wilson <jwilson@redhat.com> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/pcmcia/yenta_socket.h')
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