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authorYu Zhao <yu.zhao@intel.com>2009-05-18 13:51:32 +0800
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-05-18 11:25:54 +0100
commit302b4215daa0a704c843da40fd2529e5757a72da (patch)
tree1bc40108fceafd3fbc9faee38c971fa94d560b13 /drivers/pci/pci.h
parentdd7264355a203c3456dbba04db471947d3b55e7e (diff)
downloadblackbird-op-linux-302b4215daa0a704c843da40fd2529e5757a72da.tar.gz
blackbird-op-linux-302b4215daa0a704c843da40fd2529e5757a72da.zip
PCI: support the ATS capability
The PCIe ATS capability makes the Endpoint be able to request the DMA address translation from the IOMMU and cache the translation in the device side, thus alleviate IOMMU pressure and improve the hardware performance in the I/O virtualization environment. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/pci/pci.h')
-rw-r--r--drivers/pci/pci.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index d03f6b99f292..3c2ec64f78e9 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -229,6 +229,13 @@ struct pci_sriov {
u8 __iomem *mstate; /* VF Migration State Array */
};
+/* Address Translation Service */
+struct pci_ats {
+ int pos; /* capability position */
+ int stu; /* Smallest Translation Unit */
+ int qdep; /* Invalidate Queue Depth */
+};
+
#ifdef CONFIG_PCI_IOV
extern int pci_iov_init(struct pci_dev *dev);
extern void pci_iov_release(struct pci_dev *dev);
@@ -236,6 +243,20 @@ extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
enum pci_bar_type *type);
extern void pci_restore_iov_state(struct pci_dev *dev);
extern int pci_iov_bus_range(struct pci_bus *bus);
+
+extern int pci_enable_ats(struct pci_dev *dev, int ps);
+extern void pci_disable_ats(struct pci_dev *dev);
+extern int pci_ats_queue_depth(struct pci_dev *dev);
+/**
+ * pci_ats_enabled - query the ATS status
+ * @dev: the PCI device
+ *
+ * Returns 1 if ATS capability is enabled, or 0 if not.
+ */
+static inline int pci_ats_enabled(struct pci_dev *dev)
+{
+ return !!dev->ats;
+}
#else
static inline int pci_iov_init(struct pci_dev *dev)
{
@@ -257,6 +278,22 @@ static inline int pci_iov_bus_range(struct pci_bus *bus)
{
return 0;
}
+
+static inline int pci_enable_ats(struct pci_dev *dev, int ps)
+{
+ return -ENODEV;
+}
+static inline void pci_disable_ats(struct pci_dev *dev)
+{
+}
+static inline int pci_ats_queue_depth(struct pci_dev *dev)
+{
+ return -ENODEV;
+}
+static inline int pci_ats_enabled(struct pci_dev *dev)
+{
+ return 0;
+}
#endif /* CONFIG_PCI_IOV */
#endif /* DRIVERS_PCI_H */
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