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authorDaniel Lezcano <daniel.lezcano@linaro.org>2012-02-28 22:46:05 +0100
committerSamuel Ortiz <sameo@linux.intel.com>2012-03-06 18:46:54 +0100
commit801448e0672008acec050fbef3b8a7df7c5edcc1 (patch)
tree60195ab6b49dafcd89985f8f71f6bd63af017acd /drivers/mfd
parent61a2af301fa145490868fcf36b4bbea22398f760 (diff)
downloadblackbird-op-linux-801448e0672008acec050fbef3b8a7df7c5edcc1.tar.gz
blackbird-op-linux-801448e0672008acec050fbef3b8a7df7c5edcc1.zip
mfd : Cleanup duplicate db8500 definitions
I missed in my previous patch the A9_MASK_REQ[_MASK] were already defined. Let's remove the duplicate definitions. The PRCMU_GIC_DELAY macro could be removed as it is not really useful here. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd')
-rw-r--r--drivers/mfd/db8500-prcmu.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index b320cc602668..d2244dc5d3b1 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -821,23 +821,20 @@ u8 db8500_prcmu_get_power_state_result(void)
return readb(tcdm_base + PRCM_ACK_MB0_AP_PWRSTTR_STATUS);
}
-#define PRCMU_A9_MASK_REQ 0x00000328
-#define PRCMU_A9_MASK_REQ_MASK 0x00000001
-#define PRCMU_GIC_DELAY 1
-
/* This function decouple the gic from the prcmu */
int db8500_prcmu_gic_decouple(void)
{
- u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ);
+ u32 val = readl(PRCM_A9_MASK_REQ);
/* Set bit 0 register value to 1 */
- writel(val | PRCMU_A9_MASK_REQ_MASK, _PRCMU_BASE + PRCMU_A9_MASK_REQ);
+ writel(val | PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ,
+ PRCM_A9_MASK_REQ);
/* Make sure the register is updated */
- readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ);
+ readl(PRCM_A9_MASK_REQ);
/* Wait a few cycles for the gic mask completion */
- udelay(PRCMU_GIC_DELAY);
+ udelay(1);
return 0;
}
@@ -845,10 +842,10 @@ int db8500_prcmu_gic_decouple(void)
/* This function recouple the gic with the prcmu */
int db8500_prcmu_gic_recouple(void)
{
- u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ);
+ u32 val = readl(PRCM_A9_MASK_REQ);
/* Set bit 0 register value to 0 */
- writel(val & ~PRCMU_A9_MASK_REQ_MASK, _PRCMU_BASE + PRCMU_A9_MASK_REQ);
+ writel(val & ~PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, PRCM_A9_MASK_REQ);
return 0;
}
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