summaryrefslogtreecommitdiffstats
path: root/drivers/media/video
diff options
context:
space:
mode:
authorJean-Francois Moine <moinejf@free.fr>2008-07-15 11:46:06 -0300
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-07-20 07:26:43 -0300
commit568788a771ee88cc6b5e311a207c09731a6e47f0 (patch)
tree79a47deedcf55a9fc3d340dc4da580cef4de379a /drivers/media/video
parentf4d520258d229f093bec6937ec3d632eb95600b4 (diff)
downloadblackbird-op-linux-568788a771ee88cc6b5e311a207c09731a6e47f0.tar.gz
blackbird-op-linux-568788a771ee88cc6b5e311a207c09731a6e47f0.zip
V4L/DVB (8358): gspca: Better initialization of sn9c120 - ov7660.
Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video')
-rw-r--r--drivers/media/video/gspca/sonixj.c125
1 files changed, 85 insertions, 40 deletions
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c
index 93d4746ff95a..3e68b9926956 100644
--- a/drivers/media/video/gspca/sonixj.c
+++ b/drivers/media/video/gspca/sonixj.c
@@ -151,36 +151,36 @@ static struct v4l2_pix_format vga_mode[] = {
/*Data from sn9c102p+hv71331r */
static const __u8 sn_hv7131[] = {
- 0x00, 0x03, 0x64, 0x00, 0x1A, 0x20, 0x20, 0x20, 0xA1, 0x11,
/* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 reg9 */
- 0x02, 0x09, 0x00, 0x00, 0x00, 0x10, 0x03, 0x00, /* 00 */
+ 0x00, 0x03, 0x64, 0x00, 0x1A, 0x20, 0x20, 0x20, 0xA1, 0x11,
/* rega regb regc regd rege regf reg10 reg11 */
- 0x00, 0x01, 0x03, 0x28, 0x1e, 0x41, 0x0a, 0x00, 0x00, 0x00,
+ 0x02, 0x09, 0x00, 0x00, 0x00, 0x10, 0x03, 0x00, /* 00 */
/* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a reg1b */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ 0x00, 0x01, 0x03, 0x28, 0x1e, 0x41, 0x0a, 0x00, 0x00, 0x00,
/* reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
static const __u8 sn_mi0360[] = {
- 0x00, 0x61, 0x44, 0x00, 0x1a, 0x20, 0x20, 0x20, 0xb1, 0x5d,
/* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 reg9 */
- 0x07, 0x00, 0x00, 0x00, 0x00, 0x10, 0x03, 0x00,
+ 0x00, 0x61, 0x44, 0x00, 0x1a, 0x20, 0x20, 0x20, 0xb1, 0x5d,
/* rega regb regc regd rege regf reg10 reg11 */
- 0x00, 0x02, 0x0a, 0x28, 0x1e, 0x61, 0x06, 0x00, 0x00, 0x00,
+ 0x07, 0x00, 0x00, 0x00, 0x00, 0x10, 0x03, 0x00,
/* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a reg1b */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ 0x00, 0x02, 0x0a, 0x28, 0x1e, 0x61, 0x06, 0x00, 0x00, 0x00,
/* reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
static const __u8 sn_mo4000[] = {
- 0x12, 0x23, 0x60, 0x00, 0x1A, 0x00, 0x20, 0x18, 0x81,
/* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 */
- 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00,
+ 0x12, 0x23, 0x60, 0x00, 0x1A, 0x00, 0x20, 0x18, 0x81,
/* reg9 rega regb regc regd rege regf reg10 reg11*/
- 0x0b, 0x0f, 0x14, 0x28, 0x1e, 0x40, 0x08, 0x00, 0x00,
+ 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00,
/* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a*/
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x25, 0x39, 0x4b,
+ 0x0b, 0x0f, 0x14, 0x28, 0x1e, 0x40, 0x08, 0x00, 0x00,
/* reg1b reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23*/
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x25, 0x39, 0x4b,
0x5c, 0x6b, 0x79, 0x87, 0x95, 0xa2, 0xaf, 0xbb, 0xc7,
0xd3, 0xdf, 0xea, 0xf5
};
@@ -197,7 +197,7 @@ static const __u8 sn_ov7660[] = {
/* reg9 rega regb regc regd rege regf reg10 reg11*/
0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00,
/* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a*/
- 0x01, 0x01, 0x08, 0x28, 0x1e, 0x20, 0x07, 0x00, 0x00,
+ 0x01, 0x01, 0x14, 0x28, 0x1e, 0x00, 0x07, 0x00, 0x00,
/* reg1b reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23*/
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
@@ -215,6 +215,10 @@ static const __u8 regsn20[] = {
0x00, 0x2d, 0x46, 0x5a, 0x6c, 0x7c, 0x8b, 0x99,
0xa6, 0xb2, 0xbf, 0xca, 0xd5, 0xe0, 0xeb, 0xf5, 0xff
};
+static const __u8 regsn20_sn9c120[] = {
+ 0x00, 0x25, 0x3c, 0x50, 0x62, 0x72, 0x81, 0x90,
+ 0x9e, 0xab, 0xb8, 0xc5, 0xd1, 0xdd, 0xe9, 0xf4, 0xff
+};
static const __u8 regsn20_sn9c325[] = {
0x0a, 0x3a, 0x56, 0x6c, 0x7e, 0x8d, 0x9a, 0xa4,
0xaf, 0xbb, 0xc5, 0xcd, 0xd5, 0xde, 0xe8, 0xed, 0xf5
@@ -226,6 +230,21 @@ static const __u8 reg84[] = {
/* 0x00, 0x00, 0x00, 0x00, 0x00 */
0xf7, 0x0f, 0x0a, 0x00, 0x00
};
+static const __u8 reg84_sn9c120_1[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x0c, 0x00, 0x00
+};
+static const __u8 reg84_sn9c120_2[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x0c, 0x02, 0x3b
+};
+static const __u8 reg84_sn9c120_3[] = {
+ 0x14, 0x00, 0x27, 0x00, 0x08, 0x00, 0xeb, 0x0f,
+ 0xd5, 0x0f, 0x42, 0x00, 0x41, 0x00, 0xca, 0x0f,
+ 0xf5, 0x0f, 0x0c, 0x02, 0x3b
+};
static const __u8 reg84_sn9c325[] = {
0x14, 0x00, 0x27, 0x00, 0x07, 0x00, 0xe4, 0x0f,
0xd3, 0x0f, 0x4b, 0x00, 0x48, 0x00, 0xc0, 0x0f,
@@ -345,17 +364,15 @@ static const __u8 ov7660_sensor_init[][8] = {
{0xa1, 0x21, 0x12, 0x05, 0x00, 0x00, 0x00, 0x10},
/* Outformat ?? rawRGB */
{0xa1, 0x21, 0x13, 0xb8, 0x00, 0x00, 0x00, 0x10}, /* init COM8 */
-/* {0xd1, 0x21, 0x00, 0x01, 0x74, 0x92, 0x00, 0x10},
- * GAIN BLUE RED VREF */
- {0xd1, 0x21, 0x00, 0x01, 0x74, 0x74, 0x00, 0x10},
+ {0xd1, 0x21, 0x00, 0x01, 0x74, 0x92, 0x00, 0x10},
+/* {0xd1, 0x21, 0x00, 0x01, 0x74, 0x74, 0x00, 0x10}, */
/* GAIN BLUE RED VREF */
{0xd1, 0x21, 0x04, 0x00, 0x7d, 0x62, 0x00, 0x10},
/* COM 1 BAVE GEAVE AECHH */
{0xb1, 0x21, 0x08, 0x83, 0x01, 0x00, 0x00, 0x10}, /* RAVE COM2 */
{0xd1, 0x21, 0x0c, 0x00, 0x08, 0x04, 0x4f, 0x10}, /* COM 3 4 5 6 */
-/* {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xf8, 0x10},
- * AECH CLKRC COM7 COM8 */
- {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xff, 0x10},
+ {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xf8, 0x10},
+/* {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xff, 0x10}, */
/* AECH CLKRC COM7 COM8 */
{0xc1, 0x21, 0x14, 0x2c, 0x00, 0x02, 0x00, 0x10}, /* COM9 COM10 */
{0xd1, 0x21, 0x17, 0x10, 0x60, 0x02, 0x7b, 0x10},
@@ -364,9 +381,8 @@ static const __u8 ov7660_sensor_init[][8] = {
{0xb1, 0x21, 0x1e, 0x01, 0x0e, 0x00, 0x00, 0x10}, /* MVFP LAEC */
{0xd1, 0x21, 0x20, 0x07, 0x07, 0x07, 0x07, 0x10},
/* BOS GBOS GROS ROS (BGGR offset) */
-/* {0xd1, 0x21, 0x24, 0x68, 0x58, 0xd4, 0x80, 0x10},
- * AEW AEB VPT BBIAS */
- {0xd1, 0x21, 0x24, 0x78, 0x68, 0xd4, 0x80, 0x10},
+ {0xd1, 0x21, 0x24, 0x68, 0x58, 0xd4, 0x80, 0x10},
+/* {0xd1, 0x21, 0x24, 0x78, 0x68, 0xd4, 0x80, 0x10}, */
/* AEW AEB VPT BBIAS */
{0xd1, 0x21, 0x28, 0x80, 0x30, 0x00, 0x00, 0x10},
/* GbBIAS RSVD EXHCH EXHCL */
@@ -416,14 +432,15 @@ static const __u8 ov7660_sensor_init[][8] = {
{0xa1, 0x21, 0x10, 0x20, 0x00, 0x00, 0x00, 0x10}, /* 0x20 */
{0xa1, 0x21, 0x2d, 0x00, 0x00, 0x00, 0x00, 0x10},
{0xa1, 0x21, 0x2e, 0x00, 0x00, 0x00, 0x00, 0x10},
- {0xa1, 0x21, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x10},
-/* {0xb1, 0x21, 0x01, 0x78, 0x78, 0x00, 0x00, 0x10}, */
+/* {0xa1, 0x21, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x10}, */
+ {0xa1, 0x21, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x10},
+ {0xb1, 0x21, 0x01, 0x78, 0x78, 0x00, 0x00, 0x10},
/****** (some exchanges in the win trace) ******/
{0xa1, 0x21, 0x93, 0x00, 0x00, 0x00, 0x00, 0x10},/* dummy line hight */
{0xa1, 0x21, 0x92, 0x25, 0x00, 0x00, 0x00, 0x10},/* dummy line low */
{0xa1, 0x21, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x10},
{0xa1, 0x21, 0x2b, 0x00, 0x00, 0x00, 0x00, 0x10},
-/* {0xa1, 0x21, 0x02, 0x90, 0x00, 0x00, 0x00, 0x10}, */
+ {0xa1, 0x21, 0x02, 0x90, 0x00, 0x00, 0x00, 0x10},
/****** (some exchanges in the win trace) ******/
/**********startsensor KO if changed !!****/
{0xa1, 0x21, 0x93, 0x01, 0x00, 0x00, 0x00, 0x10},
@@ -649,14 +666,12 @@ static int configure_gpio(struct gspca_dev *gspca_dev,
regF1 = 0x00;
reg_w(gspca_dev, 0xf1, &regF1, 1);
-
- reg_w(gspca_dev, 0x01, &sn9c1xx[0], 1);
- /*fixme:jfm was [1] en v1*/
+ reg_w(gspca_dev, 0x01, &sn9c1xx[0], 1); /*fixme:jfm was [1] en v1*/
/* configure gpio */
reg_w(gspca_dev, 0x01, &sn9c1xx[1], 2);
reg_w(gspca_dev, 0x08, &sn9c1xx[8], 2);
- reg_w(gspca_dev, 0x17, &sn9c1xx[0x17], 3);
+ reg_w(gspca_dev, 0x17, &sn9c1xx[0x17], 5); /* jfm was 3 */
switch (sd->bridge) {
case BRIDGE_SN9C325:
reg9a = reg9a_sn9c325;
@@ -808,8 +823,9 @@ static int sd_config(struct gspca_dev *gspca_dev,
switch (product) {
case 0x6040:
sd->bridge = BRIDGE_SN9C102P;
- sd->sensor = SENSOR_MI0360; /* from BW600.inf */
-/* sd->sensor = SENSOR_HV7131R; * gspcav1 value */
+/* sd->sensor = SENSOR_MI0360; * from BW600.inf */
+/*fixme: MI0360 base=5d ? */
+ sd->sensor = SENSOR_HV7131R; /* gspcav1 value */
sd->i2c_base = 0x11;
break;
/* case 0x607a: * from BW600.inf
@@ -883,10 +899,11 @@ static int sd_config(struct gspca_dev *gspca_dev,
sd->i2c_base = 0x??;
break; */
case 0x612a:
-/* sd->bridge = BRIDGE_SN9C110; * in BW600.inf */
+/* sd->bridge = BRIDGE_SN9C110; * in BW600.inf */
sd->bridge = BRIDGE_SN9C325;
sd->sensor = SENSOR_OV7648;
sd->i2c_base = 0x21;
+/*fixme: sensor_init has base = 00 et 6e!*/
break;
/* case 0x6123: * from BW600.inf
sd->bridge = BRIDGE_SN9C110;
@@ -1177,31 +1194,59 @@ static void sd_start(struct gspca_dev *gspca_dev)
reg_w(gspca_dev, 0xc9, &DC29[5], 1);
/*fixme:jfm end of ending sequence */
reg_w(gspca_dev, 0x18, &sn9c1xx[0x18], 1);
- if (sd->bridge == BRIDGE_SN9C325)
+ switch (sd->bridge) {
+ case BRIDGE_SN9C325:
data = 0xae;
- else
+ break;
+ case BRIDGE_SN9C120:
+ data = 0xa0;
+ break;
+ default:
data = 0x60;
+ break;
+ }
reg_w(gspca_dev, 0x17, &data, 1);
reg_w(gspca_dev, 0x05, &sn9c1xx[5], 1);
reg_w(gspca_dev, 0x07, &sn9c1xx[7], 1);
reg_w(gspca_dev, 0x06, &sn9c1xx[6], 1);
reg_w(gspca_dev, 0x14, &sn9c1xx[0x14], 1);
- if (sd->bridge == BRIDGE_SN9C325) {
- reg_w(gspca_dev, 0x20, regsn20_sn9c325, 0x11);
+ switch (sd->bridge) {
+ case BRIDGE_SN9C325:
+ reg_w(gspca_dev, 0x20, regsn20_sn9c325,
+ sizeof regsn20_sn9c325);
for (i = 0; i < 8; i++)
- reg_w(gspca_dev, 0x84, reg84_sn9c325, 0x15);
+ reg_w(gspca_dev, 0x84, reg84_sn9c325,
+ sizeof reg84_sn9c325);
data = 0x0a;
reg_w(gspca_dev, 0x9a, &data, 1);
data = 0x60;
reg_w(gspca_dev, 0x99, &data, 1);
- } else {
- reg_w(gspca_dev, 0x20, regsn20, 0x11);
+ break;
+ case BRIDGE_SN9C120:
+ reg_w(gspca_dev, 0x20, regsn20_sn9c120,
+ sizeof regsn20_sn9c120);
+ for (i = 0; i < 2; i++)
+ reg_w(gspca_dev, 0x84, reg84_sn9c120_1,
+ sizeof reg84_sn9c120_1);
+ for (i = 0; i < 6; i++)
+ reg_w(gspca_dev, 0x84, reg84_sn9c120_2,
+ sizeof reg84_sn9c120_2);
+ reg_w(gspca_dev, 0x84, reg84_sn9c120_3,
+ sizeof reg84_sn9c120_3);
+ data = 0x05;
+ reg_w(gspca_dev, 0x9a, &data, 1);
+ data = 0x5b;
+ reg_w(gspca_dev, 0x99, &data, 1);
+ break;
+ default:
+ reg_w(gspca_dev, 0x20, regsn20, sizeof regsn20);
for (i = 0; i < 8; i++)
- reg_w(gspca_dev, 0x84, reg84, 0x15);
+ reg_w(gspca_dev, 0x84, reg84, sizeof reg84);
data = 0x08;
reg_w(gspca_dev, 0x9a, &data, 1);
data = 0x59;
reg_w(gspca_dev, 0x99, &data, 1);
+ break;
}
mode = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
OpenPOWER on IntegriCloud