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authorMarkos Chandras <markos.chandras@imgtec.com>2015-07-09 10:40:49 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-08-26 15:23:17 +0200
commit6f50c83529ac1fa3444ff4be5f5b0bf3d76db678 (patch)
tree66c726e41d01b4808a6e94f22e94efa5b998f657 /drivers/irqchip/irq-mmp.c
parentc3f57f02e3a275d8b5c6dc692adb21525ccb392c (diff)
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IRQCHIP: irq-mips-gic: Add support for CM3 64-bit timer irqs
CM3 uses a 64-bit counter and compare registers so add support for them in the GIC counter interrupt. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10648/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/irqchip/irq-mmp.c')
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