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authorChris Wilson <chris@chris-wilson.co.uk>2011-03-17 07:18:29 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2011-03-23 06:41:02 +0000
commit00d70b15125030391d17baab2c2f70f93b3339a6 (patch)
tree92bf3c5349bfaab6f4c82f62a5cf5480ec2c8a5e /drivers/gpu
parent762237bb714b0cd93ce2405ccc891fadb405c26e (diff)
downloadblackbird-op-linux-00d70b15125030391d17baab2c2f70f93b3339a6.tar.gz
blackbird-op-linux-00d70b15125030391d17baab2c2f70f93b3339a6.zip
drm/i915: skip redundant operations whilst enabling pipes and planes
If the pipe or plane is already enabled, then we do not need to enable it again and can skip the delay. Similarly if it is already disabled when we want to disable it, we can also skip it. This fixes a regression from b24e717988, which caused the LVDS output on one PineView machine to become corrupt after changing orientation several times. References: https://bugs.freedesktop.org/show_bug.cgi?id=34601 Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Keith Packard <keithp@keithp.com> Tested-by: mengmeng.meng@intel.com
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c24
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3bc6ab56cf8b..841f0397288b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1516,8 +1516,10 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
reg = PIPECONF(pipe);
val = I915_READ(reg);
- val |= PIPECONF_ENABLE;
- I915_WRITE(reg, val);
+ if (val & PIPECONF_ENABLE)
+ return;
+
+ I915_WRITE(reg, val | PIPECONF_ENABLE);
intel_wait_for_vblank(dev_priv->dev, pipe);
}
@@ -1551,8 +1553,10 @@ static void intel_disable_pipe(struct drm_i915_private *dev_priv,
reg = PIPECONF(pipe);
val = I915_READ(reg);
- val &= ~PIPECONF_ENABLE;
- I915_WRITE(reg, val);
+ if ((val & PIPECONF_ENABLE) == 0)
+ return;
+
+ I915_WRITE(reg, val & ~PIPECONF_ENABLE);
intel_wait_for_pipe_off(dev_priv->dev, pipe);
}
@@ -1575,8 +1579,10 @@ static void intel_enable_plane(struct drm_i915_private *dev_priv,
reg = DSPCNTR(plane);
val = I915_READ(reg);
- val |= DISPLAY_PLANE_ENABLE;
- I915_WRITE(reg, val);
+ if (val & DISPLAY_PLANE_ENABLE)
+ return;
+
+ I915_WRITE(reg, val | DISPLAY_PLANE_ENABLE);
intel_wait_for_vblank(dev_priv->dev, pipe);
}
@@ -1607,8 +1613,10 @@ static void intel_disable_plane(struct drm_i915_private *dev_priv,
reg = DSPCNTR(plane);
val = I915_READ(reg);
- val &= ~DISPLAY_PLANE_ENABLE;
- I915_WRITE(reg, val);
+ if ((val & DISPLAY_PLANE_ENABLE) == 0)
+ return;
+
+ I915_WRITE(reg, val & ~DISPLAY_PLANE_ENABLE);
intel_flush_display_plane(dev_priv, plane);
intel_wait_for_vblank(dev_priv->dev, pipe);
}
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