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authorChris Wilson <chris@chris-wilson.co.uk>2010-09-08 21:07:28 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-08 21:20:27 +0100
commit1af5fa1b7e5ff8332f8a2ee3c5fb44d93b34868d (patch)
tree7839004c008fe526a8fe94edae350d137d3d640b /drivers/gpu/drm
parent2c9d97545914cc764786702f361a1f1c9bb8dfa9 (diff)
downloadblackbird-op-linux-1af5fa1b7e5ff8332f8a2ee3c5fb44d93b34868d.tar.gz
blackbird-op-linux-1af5fa1b7e5ff8332f8a2ee3c5fb44d93b34868d.zip
drm/i915/dp: Flush the PLL register write before sleeping
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 27805a9ca877..c7aa29bfdea9 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -883,6 +883,7 @@ static void ironlake_edp_pll_off(struct drm_encoder *encoder)
dpa_ctl = I915_READ(DP_A);
dpa_ctl |= DP_PLL_ENABLE;
I915_WRITE(DP_A, dpa_ctl);
+ POSTING_READ(DP_A);
udelay(200);
}
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