diff options
| author | Christian König <christian.koenig@amd.com> | 2014-06-03 20:51:46 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-06-09 22:06:48 -0400 |
| commit | 5e167cdbf6ab51c7cc7c3c2efdc54ec1080834d3 (patch) | |
| tree | 9905fda9cd5c888147cedcb7ca3bb5ab40065097 /drivers/gpu/drm/radeon/si.c | |
| parent | 4c0dae57873edb1560b738c6519361c5ecd443ae (diff) | |
| download | blackbird-op-linux-5e167cdbf6ab51c7cc7c3c2efdc54ec1080834d3.tar.gz blackbird-op-linux-5e167cdbf6ab51c7cc7c3c2efdc54ec1080834d3.zip | |
drm/radeon: use lower_32_bits where appropriate
Replace occurrences of "v & 0xffffffff" with lower_32_bits(v)
when it's next to an upper_32_bits(v). Also remove unnecessary
"upper_32_bits(v) & 0xffffffff" code snippets.
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/si.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index d64ef9115b69..85d030ecebae 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -3186,7 +3186,7 @@ void si_fence_ring_emit(struct radeon_device *rdev, /* EVENT_WRITE_EOP - flush caches, send int */ radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); radeon_ring_write(ring, EVENT_TYPE(CACHE_FLUSH_AND_INV_TS_EVENT) | EVENT_INDEX(5)); - radeon_ring_write(ring, addr & 0xffffffff); + radeon_ring_write(ring, lower_32_bits(addr)); radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | DATA_SEL(1) | INT_SEL(2)); radeon_ring_write(ring, fence->seq); radeon_ring_write(ring, 0); @@ -3219,7 +3219,7 @@ void si_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); radeon_ring_write(ring, (1 << 8)); radeon_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc); - radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff); + radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr)); radeon_ring_write(ring, next_rptr); } |
