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author | Eugeni Dodonov <eugeni.dodonov@intel.com> | 2012-07-04 20:15:16 -0300 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-07-05 15:09:03 +0200 |
commit | 4acf518626cdad5bbf7aac9869bd4accbbfb4ad3 (patch) | |
tree | a8e9292d7d959f92612c185ae7992670df38a0f3 /drivers/gpu/drm/i915/intel_ddi.c | |
parent | 6c2b7c1208b762abc0df318ae53d18d9e5414e1b (diff) | |
download | blackbird-op-linux-4acf518626cdad5bbf7aac9869bd4accbbfb4ad3.tar.gz blackbird-op-linux-4acf518626cdad5bbf7aac9869bd4accbbfb4ad3.zip |
drm/i915: program FDI_RX TP and FDI delays
This is required for a stable FDI connection.
v2: fix and simplify the FDI_RX_MISC bits as noticed by Paulo Zanoni.
CC: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index f33fe1a1c33e..933c74859172 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -170,6 +170,15 @@ void hsw_fdi_link_train(struct drm_crtc *crtc) udelay(600); + /* We need to program FDI_RX_MISC with the default TP1 to TP2 + * values before enabling the receiver, and configure the delay + * for the FDI timing generator to 90h. Luckily, all the other + * bits are supposed to be zeroed, so we can write those values + * directly. + */ + I915_WRITE(FDI_RX_MISC(pipe), FDI_RX_TP1_TO_TP2_48 | + FDI_RX_FDI_DELAY_90); + /* Enable CPU FDI Receiver with auto-training */ reg = FDI_RX_CTL(pipe); I915_WRITE(reg, |