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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-11 20:42:38 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-17 11:19:52 +0200
commitde4a8bd16205283e9cb746e8fbfa7f9735c039b5 (patch)
tree4c9f0ba6aec0d92a81f5032c1d49917de5081e87 /drivers/gpu/drm/i915/i915_reg.h
parent767878908e7cc28c440c5431f6591157d8bd4ae7 (diff)
downloadblackbird-op-linux-de4a8bd16205283e9cb746e8fbfa7f9735c039b5.tar.gz
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drm/i915: implement a media hang w/a
Contrary to the other clock gating w/a in GEN6_UCGCTL1, this one is actually documented in Bspec, vol1g "GT Interface Registers [SNB]", Section 1.5.1 "UCGCTL1 - Unit Level Clock Gating Control 1". Supposedly this can prevent hangs on the media ring. Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3f7fc4629363..1124e4f594f5 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3893,6 +3893,7 @@
#define GEN6_UCGCTL1 0x9400
# define GEN6_BLBUNIT_CLOCK_GATE_DISABLE (1 << 5)
+# define GEN6_CSUNIT_CLOCK_GATE_DISABLE (1 << 7)
#define GEN6_UCGCTL2 0x9404
# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13)
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