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authorZhenyu Wang <zhenyuw@linux.intel.com>2009-07-24 01:00:29 +0800
committerEric Anholt <eric@anholt.net>2009-07-29 15:16:01 -0700
commit249c0e64c24bf455a4e4815f72750f2b16cedd94 (patch)
tree0a75d3f0f48acdd5341a9670dc7c860af7669940 /drivers/gpu/drm/i915/i915_reg.h
parent24f119c769bacac5729297b682fec7811a983cc6 (diff)
downloadblackbird-op-linux-249c0e64c24bf455a4e4815f72750f2b16cedd94.tar.gz
blackbird-op-linux-249c0e64c24bf455a4e4815f72750f2b16cedd94.zip
drm/i915: fix issue in display pipe setup on IGDNG
During pipe DPMS off, instead of busy waiting pipe off, insert delays during wait and don't loop after enough tries which matches spec requirement. Also try to match DPMS on path by disable FDI TX PLL in DPMS off. Disable PF by writing PF_WIN_SZ which really trigger the update. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 897a116cad14..7c77c4c53c52 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1848,6 +1848,8 @@
#define PFA_CTL_1 0x68080
#define PFB_CTL_1 0x68880
#define PF_ENABLE (1<<31)
+#define PFA_WIN_SZ 0x68074
+#define PFB_WIN_SZ 0x68874
/* legacy palette */
#define LGC_PALETTE_A 0x4a000
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