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authorChris Wilson <chris@chris-wilson.co.uk>2013-08-08 14:41:09 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-08-22 13:31:34 +0200
commit000433b67e46771a7c08f78574943855a98c53ec (patch)
tree7a7ef8cd2425158d0f376c130a3505560fd0a585 /drivers/gpu/drm/i915/i915_gem.c
parentd46f1c3f1372e3a72fab97c60480aa4a1084387f (diff)
downloadblackbird-op-linux-000433b67e46771a7c08f78574943855a98c53ec.tar.gz
blackbird-op-linux-000433b67e46771a7c08f78574943855a98c53ec.zip
drm/i915: Only do a chipset flush after a clflush
Now that we skip clflushes more often, return a boolean indicating whether the clflush was actually performed, and only if it was do the chipset flush. (Though on most of the architectures where the clflush will be skipped, the chipset flush is a no-op!) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c20
1 files changed, 11 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 54d76e9392d8..959dffba0f0e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -841,8 +841,8 @@ out:
*/
if (!needs_clflush_after &&
obj->base.write_domain != I915_GEM_DOMAIN_CPU) {
- i915_gem_clflush_object(obj, obj->pin_display);
- i915_gem_chipset_flush(dev);
+ if (i915_gem_clflush_object(obj, obj->pin_display))
+ i915_gem_chipset_flush(dev);
}
}
@@ -3224,7 +3224,7 @@ err_unpin:
return ret;
}
-void
+bool
i915_gem_clflush_object(struct drm_i915_gem_object *obj,
bool force)
{
@@ -3233,14 +3233,14 @@ i915_gem_clflush_object(struct drm_i915_gem_object *obj,
* again at bind time.
*/
if (obj->pages == NULL)
- return;
+ return false;
/*
* Stolen memory is always coherent with the GPU as it is explicitly
* marked as wc by the system, or the system is cache-coherent.
*/
if (obj->stolen)
- return;
+ return false;
/* If the GPU is snooping the contents of the CPU cache,
* we do not need to manually clear the CPU cache lines. However,
@@ -3251,11 +3251,12 @@ i915_gem_clflush_object(struct drm_i915_gem_object *obj,
* tracking.
*/
if (!force && cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
- return;
+ return false;
trace_i915_gem_object_clflush(obj);
-
drm_clflush_sg(obj->pages);
+
+ return true;
}
/** Flushes the GTT write domain for the object if it's dirty. */
@@ -3295,8 +3296,9 @@ i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj,
if (obj->base.write_domain != I915_GEM_DOMAIN_CPU)
return;
- i915_gem_clflush_object(obj, force);
- i915_gem_chipset_flush(obj->base.dev);
+ if (i915_gem_clflush_object(obj, force))
+ i915_gem_chipset_flush(obj->base.dev);
+
old_write_domain = obj->base.write_domain;
obj->base.write_domain = 0;
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