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| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-06-25 10:11:40 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-06-25 10:11:40 +0100 |
| commit | 85e63343f49cdf859bb630ba39d9a9af85dfb3e6 (patch) | |
| tree | 8c72184c38d93a34e08f386ae70b4ee12ed7ac20 /drivers/gpu/drm/exynos/exynos_mixer.c | |
| parent | 2f6ae6ef631cd16b0725958ee805a24b9e38d7ad (diff) | |
| parent | 6b16351acbd415e66ba16bf7d473ece1574cf0bc (diff) | |
| download | blackbird-op-linux-85e63343f49cdf859bb630ba39d9a9af85dfb3e6.tar.gz blackbird-op-linux-85e63343f49cdf859bb630ba39d9a9af85dfb3e6.zip | |
Merge tag 'v3.5-rc4' into regulator-drivers
Linux 3.5-rc4 contains patches which conflict with some of the
development work.
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_mixer.c')
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_mixer.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 68ef01028375..e2147a2ddcec 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -365,7 +365,7 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) switch (win_data->pixel_format) { case DRM_FORMAT_NV12MT: tiled_mode = true; - case DRM_FORMAT_NV12M: + case DRM_FORMAT_NV12: crcb_mode = false; buf_num = 2; break; @@ -601,18 +601,20 @@ static void mixer_win_reset(struct mixer_context *ctx) mixer_reg_write(res, MXR_BG_COLOR2, 0x008080); /* setting graphical layers */ - val = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */ val |= MXR_GRP_CFG_WIN_BLEND_EN; + val |= MXR_GRP_CFG_BLEND_PRE_MUL; + val |= MXR_GRP_CFG_PIXEL_BLEND_EN; val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */ /* the same configuration for both layers */ mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val); - - val |= MXR_GRP_CFG_BLEND_PRE_MUL; - val |= MXR_GRP_CFG_PIXEL_BLEND_EN; mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val); + /* setting video layers */ + val = MXR_GRP_CFG_ALPHA_VAL(0); + mixer_reg_write(res, MXR_VIDEO_CFG, val); + /* configuration of Video Processor Registers */ vp_win_reset(ctx); vp_default_filter(res); |
