diff options
author | Al Viro <viro@ftp.linux.org.uk> | 2008-03-19 16:27:48 +0000 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-03-19 19:42:36 -0700 |
commit | 457fb605834504af294916411be128a9b21fc3f6 (patch) | |
tree | 6813daab294e40068269c0564bd8c4f479f73dbc /drivers/char | |
parent | 635440c0235537a3f0a90ed5b6f8cd8a5da862de (diff) | |
download | blackbird-op-linux-457fb605834504af294916411be128a9b21fc3f6.tar.gz blackbird-op-linux-457fb605834504af294916411be128a9b21fc3f6.zip |
drivers/char/rocket portability fixes
unsigned long != __le32, TYVM, and unsigned char[4] is not guaranteed
to be aligned for u32.
While we are at it, sanitize sOutDW() a bit - have it take Byte_t * and
handle dereferencing internally.
NB: sWriteTxPrioByte() is almost certainly buggered on big-endian and is
missing cpu_to_le16() on assignments to *WordPtr; I've left it alone for now.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Acked-by: "Theodore Ts'o" <tytso@mit.edu>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/char')
-rw-r--r-- | drivers/char/rocket.c | 37 | ||||
-rw-r--r-- | drivers/char/rocket_int.h | 83 |
2 files changed, 56 insertions, 64 deletions
diff --git a/drivers/char/rocket.c b/drivers/char/rocket.c index 72f289279d8f..f585bc8579e9 100644 --- a/drivers/char/rocket.c +++ b/drivers/char/rocket.c @@ -83,6 +83,7 @@ #include <linux/pci.h> #include <asm/uaccess.h> #include <asm/atomic.h> +#include <asm/unaligned.h> #include <linux/bitops.h> #include <linux/spinlock.h> #include <linux/init.h> @@ -1312,7 +1313,7 @@ static int rp_tiocmset(struct tty_struct *tty, struct file *file, if (clear & TIOCM_DTR) info->channel.TxControl[3] &= ~SET_DTR; - sOutDW(info->channel.IndexAddr, *(DWord_t *) & (info->channel.TxControl[0])); + out32(info->channel.IndexAddr, info->channel.TxControl); return 0; } @@ -1748,7 +1749,7 @@ static int rp_write(struct tty_struct *tty, /* Write remaining data into the port's xmit_buf */ while (1) { - if (info->tty == 0) /* Seemingly obligatory check... */ + if (!info->tty) /* Seemingly obligatory check... */ goto end; c = min(count, min(XMIT_BUF_SIZE - info->xmit_cnt - 1, XMIT_BUF_SIZE - info->xmit_head)); @@ -2798,7 +2799,7 @@ static int sReadAiopNumChan(WordIO_t io) static Byte_t R[4] = { 0x00, 0x00, 0x34, 0x12 }; /* write to chan 0 SRAM */ - sOutDW((DWordIO_t) io + _INDX_ADDR, *((DWord_t *) & R[0])); + out32((DWordIO_t) io + _INDX_ADDR, R); sOutW(io + _INDX_ADDR, 0); /* read from SRAM, chan 0 */ x = sInW(io + _INDX_DATA); sOutW(io + _INDX_ADDR, 0x4000); /* read from SRAM, chan 4 */ @@ -2864,7 +2865,7 @@ static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum, R[1] = RData[i + 1] + 0x10 * ChanNum; R[2] = RData[i + 2]; R[3] = RData[i + 3]; - sOutDW(ChP->IndexAddr, *((DWord_t *) & R[0])); + out32(ChP->IndexAddr, R); } ChR = ChP->R; @@ -2887,43 +2888,43 @@ static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum, ChP->BaudDiv[1] = (Byte_t) ((ChOff + _BAUD) >> 8); ChP->BaudDiv[2] = (Byte_t) brd9600; ChP->BaudDiv[3] = (Byte_t) (brd9600 >> 8); - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->BaudDiv[0]); + out32(ChP->IndexAddr, ChP->BaudDiv); ChP->TxControl[0] = (Byte_t) (ChOff + _TX_CTRL); ChP->TxControl[1] = (Byte_t) ((ChOff + _TX_CTRL) >> 8); ChP->TxControl[2] = 0; ChP->TxControl[3] = 0; - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]); + out32(ChP->IndexAddr, ChP->TxControl); ChP->RxControl[0] = (Byte_t) (ChOff + _RX_CTRL); ChP->RxControl[1] = (Byte_t) ((ChOff + _RX_CTRL) >> 8); ChP->RxControl[2] = 0; ChP->RxControl[3] = 0; - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]); + out32(ChP->IndexAddr, ChP->RxControl); ChP->TxEnables[0] = (Byte_t) (ChOff + _TX_ENBLS); ChP->TxEnables[1] = (Byte_t) ((ChOff + _TX_ENBLS) >> 8); ChP->TxEnables[2] = 0; ChP->TxEnables[3] = 0; - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxEnables[0]); + out32(ChP->IndexAddr, ChP->TxEnables); ChP->TxCompare[0] = (Byte_t) (ChOff + _TXCMP1); ChP->TxCompare[1] = (Byte_t) ((ChOff + _TXCMP1) >> 8); ChP->TxCompare[2] = 0; ChP->TxCompare[3] = 0; - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxCompare[0]); + out32(ChP->IndexAddr, ChP->TxCompare); ChP->TxReplace1[0] = (Byte_t) (ChOff + _TXREP1B1); ChP->TxReplace1[1] = (Byte_t) ((ChOff + _TXREP1B1) >> 8); ChP->TxReplace1[2] = 0; ChP->TxReplace1[3] = 0; - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxReplace1[0]); + out32(ChP->IndexAddr, ChP->TxReplace1); ChP->TxReplace2[0] = (Byte_t) (ChOff + _TXREP2); ChP->TxReplace2[1] = (Byte_t) ((ChOff + _TXREP2) >> 8); ChP->TxReplace2[2] = 0; ChP->TxReplace2[3] = 0; - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxReplace2[0]); + out32(ChP->IndexAddr, ChP->TxReplace2); ChP->TxFIFOPtrs = ChOff + _TXF_OUTP; ChP->TxFIFO = ChOff + _TX_FIFO; @@ -2979,7 +2980,7 @@ static void sStopRxProcessor(CHANNEL_T * ChP) R[1] = ChP->R[1]; R[2] = 0x0a; R[3] = ChP->R[3]; - sOutDW(ChP->IndexAddr, *(DWord_t *) & R[0]); + out32(ChP->IndexAddr, R); } /*************************************************************************** @@ -3094,13 +3095,13 @@ static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data) *WordPtr = ChP->TxPrioBuf; /* data byte address */ DWBuf[2] = Data; /* data byte value */ - sOutDW(IndexAddr, *((DWord_t *) (&DWBuf[0]))); /* write it out */ + out32(IndexAddr, DWBuf); /* write it out */ *WordPtr = ChP->TxPrioCnt; /* Tx priority count address */ DWBuf[2] = PRI_PEND + 1; /* indicate 1 byte pending */ DWBuf[3] = 0; /* priority buffer pointer */ - sOutDW(IndexAddr, *((DWord_t *) (&DWBuf[0]))); /* write it out */ + out32(IndexAddr, DWBuf); /* write it out */ } else { /* write it to Tx FIFO */ sWriteTxByte(sGetTxRxDataIO(ChP), Data); @@ -3147,11 +3148,11 @@ static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags) ChP->RxControl[2] |= ((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN)); - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]); + out32(ChP->IndexAddr, ChP->RxControl); ChP->TxControl[2] |= ((Byte_t) Flags & TXINT_EN); - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]); + out32(ChP->IndexAddr, ChP->TxControl); if (Flags & CHANINT_EN) { Mask = sInB(ChP->IntMask) | sBitMapSetTbl[ChP->ChanNum]; @@ -3190,9 +3191,9 @@ static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags) ChP->RxControl[2] &= ~((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN)); - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]); + out32(ChP->IndexAddr, ChP->RxControl); ChP->TxControl[2] &= ~((Byte_t) Flags & TXINT_EN); - sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]); + out32(ChP->IndexAddr, ChP->TxControl); if (Flags & CHANINT_EN) { Mask = sInB(ChP->IntMask) & sBitMapClrTbl[ChP->ChanNum]; diff --git a/drivers/char/rocket_int.h b/drivers/char/rocket_int.h index f3a75791b811..b01d38125a8f 100644 --- a/drivers/char/rocket_int.h +++ b/drivers/char/rocket_int.h @@ -26,7 +26,6 @@ typedef unsigned int ByteIO_t; typedef unsigned int Word_t; typedef unsigned int WordIO_t; -typedef unsigned long DWord_t; typedef unsigned int DWordIO_t; /* @@ -38,7 +37,6 @@ typedef unsigned int DWordIO_t; * instruction. */ -#ifdef ROCKET_DEBUG_IO static inline void sOutB(unsigned short port, unsigned char value) { #ifdef ROCKET_DEBUG_IO @@ -55,12 +53,13 @@ static inline void sOutW(unsigned short port, unsigned short value) outw_p(value, port); } -static inline void sOutDW(unsigned short port, unsigned long value) +static inline void out32(unsigned short port, Byte_t *p) { + u32 value = le32_to_cpu(get_unaligned((__le32 *)p)); #ifdef ROCKET_DEBUG_IO - printk(KERN_DEBUG "sOutDW(%x, %lx)...\n", port, value); + printk(KERN_DEBUG "out32(%x, %lx)...\n", port, value); #endif - outl_p(cpu_to_le32(value), port); + outl_p(value, port); } static inline unsigned char sInB(unsigned short port) @@ -73,14 +72,6 @@ static inline unsigned short sInW(unsigned short port) return inw_p(port); } -#else /* !ROCKET_DEBUG_IO */ -#define sOutB(a, b) outb_p(b, a) -#define sOutW(a, b) outw_p(b, a) -#define sOutDW(port, value) outl_p(cpu_to_le32(value), port) -#define sInB(a) (inb_p(a)) -#define sInW(a) (inw_p(a)) -#endif /* ROCKET_DEBUG_IO */ - /* This is used to move arrays of bytes so byte swapping isn't appropriate. */ #define sOutStrW(port, addr, count) if (count) outsw(port, addr, count) #define sInStrW(port, addr, count) if (count) insw(port, addr, count) @@ -390,7 +381,7 @@ Call: sClrBreak(ChP) #define sClrBreak(ChP) \ do { \ (ChP)->TxControl[3] &= ~SETBREAK; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -402,7 +393,7 @@ Call: sClrDTR(ChP) #define sClrDTR(ChP) \ do { \ (ChP)->TxControl[3] &= ~SET_DTR; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -415,7 +406,7 @@ Call: sClrRTS(ChP) do { \ if ((ChP)->rtsToggle) break; \ (ChP)->TxControl[3] &= ~SET_RTS; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -489,7 +480,7 @@ Call: sDisCTSFlowCtl(ChP) #define sDisCTSFlowCtl(ChP) \ do { \ (ChP)->TxControl[2] &= ~CTSFC_EN; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -501,7 +492,7 @@ Call: sDisIXANY(ChP) #define sDisIXANY(ChP) \ do { \ (ChP)->R[0x0e] = 0x86; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x0c]); \ + out32((ChP)->IndexAddr,&(ChP)->R[0x0c]); \ } while (0) /*************************************************************************** @@ -515,7 +506,7 @@ Comments: Function sSetParity() can be used in place of functions sEnParity(), #define sDisParity(ChP) \ do { \ (ChP)->TxControl[2] &= ~PARITY_EN; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -527,7 +518,7 @@ Call: sDisRTSToggle(ChP) #define sDisRTSToggle(ChP) \ do { \ (ChP)->TxControl[2] &= ~RTSTOG_EN; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ (ChP)->rtsToggle = 0; \ } while (0) @@ -540,7 +531,7 @@ Call: sDisRxFIFO(ChP) #define sDisRxFIFO(ChP) \ do { \ (ChP)->R[0x32] = 0x0a; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x30]); \ + out32((ChP)->IndexAddr,&(ChP)->R[0x30]); \ } while (0) /*************************************************************************** @@ -567,7 +558,7 @@ Call: sDisTransmit(ChP) #define sDisTransmit(ChP) \ do { \ (ChP)->TxControl[3] &= ~TX_ENABLE; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -579,7 +570,7 @@ Call: sDisTxSoftFlowCtl(ChP) #define sDisTxSoftFlowCtl(ChP) \ do { \ (ChP)->R[0x06] = 0x8a; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \ + out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \ } while (0) /*************************************************************************** @@ -604,7 +595,7 @@ Call: sEnCTSFlowCtl(ChP) #define sEnCTSFlowCtl(ChP) \ do { \ (ChP)->TxControl[2] |= CTSFC_EN; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -616,7 +607,7 @@ Call: sEnIXANY(ChP) #define sEnIXANY(ChP) \ do { \ (ChP)->R[0x0e] = 0x21; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x0c]); \ + out32((ChP)->IndexAddr,&(ChP)->R[0x0c]); \ } while (0) /*************************************************************************** @@ -633,7 +624,7 @@ Warnings: Before enabling parity odd or even parity should be chosen using #define sEnParity(ChP) \ do { \ (ChP)->TxControl[2] |= PARITY_EN; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -647,10 +638,10 @@ Comments: This function will disable RTS flow control and clear the RTS #define sEnRTSToggle(ChP) \ do { \ (ChP)->RxControl[2] &= ~RTSFC_EN; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->RxControl); \ (ChP)->TxControl[2] |= RTSTOG_EN; \ (ChP)->TxControl[3] &= ~SET_RTS; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ (ChP)->rtsToggle = 1; \ } while (0) @@ -663,7 +654,7 @@ Call: sEnRxFIFO(ChP) #define sEnRxFIFO(ChP) \ do { \ (ChP)->R[0x32] = 0x08; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x30]); \ + out32((ChP)->IndexAddr,&(ChP)->R[0x30]); \ } while (0) /*************************************************************************** @@ -684,7 +675,7 @@ Warnings: This function must be called after valid microcode has been #define sEnRxProcessor(ChP) \ do { \ (ChP)->RxControl[2] |= RXPROC_EN; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->RxControl); \ } while (0) /*************************************************************************** @@ -708,7 +699,7 @@ Call: sEnTransmit(ChP) #define sEnTransmit(ChP) \ do { \ (ChP)->TxControl[3] |= TX_ENABLE; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -720,7 +711,7 @@ Call: sEnTxSoftFlowCtl(ChP) #define sEnTxSoftFlowCtl(ChP) \ do { \ (ChP)->R[0x06] = 0xc5; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \ + out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \ } while (0) /*************************************************************************** @@ -927,7 +918,7 @@ Call: sSendBreak(ChP) #define sSendBreak(ChP) \ do { \ (ChP)->TxControl[3] |= SETBREAK; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -941,7 +932,7 @@ Call: sSetBaud(ChP,Divisor) do { \ (ChP)->BaudDiv[2] = (Byte_t)(DIVISOR); \ (ChP)->BaudDiv[3] = (Byte_t)((DIVISOR) >> 8); \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->BaudDiv[0]); \ + out32((ChP)->IndexAddr,(ChP)->BaudDiv); \ } while (0) /*************************************************************************** @@ -953,7 +944,7 @@ Call: sSetData7(ChP) #define sSetData7(ChP) \ do { \ (ChP)->TxControl[2] &= ~DATA8BIT; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -965,7 +956,7 @@ Call: sSetData8(ChP) #define sSetData8(ChP) \ do { \ (ChP)->TxControl[2] |= DATA8BIT; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -977,7 +968,7 @@ Call: sSetDTR(ChP) #define sSetDTR(ChP) \ do { \ (ChP)->TxControl[3] |= SET_DTR; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -994,7 +985,7 @@ Warnings: This function has no effect unless parity is enabled with function #define sSetEvenParity(ChP) \ do { \ (ChP)->TxControl[2] |= EVEN_PAR; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -1011,7 +1002,7 @@ Warnings: This function has no effect unless parity is enabled with function #define sSetOddParity(ChP) \ do { \ (ChP)->TxControl[2] &= ~EVEN_PAR; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -1024,7 +1015,7 @@ Call: sSetRTS(ChP) do { \ if ((ChP)->rtsToggle) break; \ (ChP)->TxControl[3] |= SET_RTS; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -1050,7 +1041,7 @@ Comments: An interrupt will be generated when the trigger level is reached do { \ (ChP)->RxControl[2] &= ~TRIG_MASK; \ (ChP)->RxControl[2] |= LEVEL; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->RxControl); \ } while (0) /*************************************************************************** @@ -1062,7 +1053,7 @@ Call: sSetStop1(ChP) #define sSetStop1(ChP) \ do { \ (ChP)->TxControl[2] &= ~STOP2; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -1074,7 +1065,7 @@ Call: sSetStop2(ChP) #define sSetStop2(ChP) \ do { \ (ChP)->TxControl[2] |= STOP2; \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \ + out32((ChP)->IndexAddr,(ChP)->TxControl); \ } while (0) /*************************************************************************** @@ -1087,7 +1078,7 @@ Call: sSetTxXOFFChar(ChP,Ch) #define sSetTxXOFFChar(ChP,CH) \ do { \ (ChP)->R[0x07] = (CH); \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \ + out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \ } while (0) /*************************************************************************** @@ -1100,7 +1091,7 @@ Call: sSetTxXONChar(ChP,Ch) #define sSetTxXONChar(ChP,CH) \ do { \ (ChP)->R[0x0b] = (CH); \ - sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x08]); \ + out32((ChP)->IndexAddr,&(ChP)->R[0x08]); \ } while (0) /*************************************************************************** @@ -1113,7 +1104,7 @@ Comments: This function is used to start a Rx processor after it was will restart both the Rx processor and software input flow control. */ -#define sStartRxProcessor(ChP) sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0]) +#define sStartRxProcessor(ChP) out32((ChP)->IndexAddr,&(ChP)->R[0]) /*************************************************************************** Function: sWriteTxByte |