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authorStephen Boyd <sboyd@codeaurora.org>2014-08-29 12:49:26 -0700
committerMike Turquette <mturquette@linaro.org>2014-09-02 16:52:28 -0700
commitd8210e28e5807091f38d064142223e8787cc9883 (patch)
tree38fc1b750e0760768b0fd6e452ab3db6409cf3da /crypto/cast5_generic.c
parente8531ac8b21a3e89db8729d2cd9de43b09818092 (diff)
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clk: qcom: Fix sdc 144kHz frequency entry
The pre-divider for the sdc clocks only has 2 bits in it, so we can't possibly divide by anything larger than 4 here. Furthermore, we program the value of ~(n - m) and the n value is larger than 8 bits (max of 256). Replace this entry with 200kHz which is close enough to 144kHz to be usable. Cc: Kumar Gala <galak@codeaurora.org> Cc: Andy Gross <agross@codeaurora.org> Fixes: 24d8fba44af3 "clk: qcom: Add support for IPQ8064's global clock controller (GCC)" Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'crypto/cast5_generic.c')
0 files changed, 0 insertions, 0 deletions
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