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authorMax Filippov <jcmvbkbc@gmail.com>2016-03-07 01:36:33 +0300
committerChris Zankel <chris@zankel.net>2016-03-11 08:53:32 +0000
commit6ec7026ac01f3db039e0428db1f37590685ad3e7 (patch)
tree9a3ac45e85c4ba604ce9dde4d14c103c9d2e70ff /arch/xtensa/kernel/head.S
parent816aa58895ca4a6176caded477a655fc82aab5f5 (diff)
downloadblackbird-op-linux-6ec7026ac01f3db039e0428db1f37590685ad3e7.tar.gz
blackbird-op-linux-6ec7026ac01f3db039e0428db1f37590685ad3e7.zip
xtensa: use context structure for debug exceptions
With implementation of data breakpoints debug exceptions raised when PS.EXCM is set need to be handled, e.g. window overflow code can write to watched userspace address. Currently debug exception handler uses EXCSAVE and DEPC SRs to save temporary registers, but DEPC may not be available when PS.EXCM is set and more space will be needed to save additional state. Reorganize debug context: create per-CPU structure debug_table instance and store its address in the EXCSAVE<debug level> instead of debug_exception function address. Expand this structure when more save space is needed. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/kernel/head.S')
-rw-r--r--arch/xtensa/kernel/head.S5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S
index 05e1df943856..bc4f4bf05099 100644
--- a/arch/xtensa/kernel/head.S
+++ b/arch/xtensa/kernel/head.S
@@ -197,11 +197,6 @@ ENTRY(_startup)
wsr a2, ps # (enable reg-windows; progmode stack)
rsync
- /* Set up EXCSAVE[DEBUGLEVEL] to point to the Debug Exception Handler.*/
-
- movi a2, debug_exception
- wsr a2, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
-
#ifdef CONFIG_SMP
/*
* Notice that we assume with SMP that cores have PRID
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