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| author | Al Viro <viro@zeniv.linux.org.uk> | 2012-11-16 20:48:13 -0500 |
|---|---|---|
| committer | Al Viro <viro@zeniv.linux.org.uk> | 2012-11-16 20:49:06 -0500 |
| commit | 85910c202bb869edd2bb9a6c217a658c83f06f1e (patch) | |
| tree | fcf4bf1ba2ebfcb6dec395a10ed6b33e7d33217e /arch/xtensa/include/asm/regs.h | |
| parent | f7200d4c504a385b1b70f3bab379f99745f7ef6a (diff) | |
| parent | 517ffce4e1a03aea979fe3a18a3dd1761a24fafb (diff) | |
| download | blackbird-op-linux-85910c202bb869edd2bb9a6c217a658c83f06f1e.tar.gz blackbird-op-linux-85910c202bb869edd2bb9a6c217a658c83f06f1e.zip | |
Merge commit '517ffce4e1a03aea979fe3a18a3dd1761a24fafb' into arch-sparc
Backmerge from the point in mainline where a trivial conflict had been
introduced (arch/sparc/kernel/sys_sparc_64.c had grown sys_kern_features()
right after where kernel_execve() used to be)
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Diffstat (limited to 'arch/xtensa/include/asm/regs.h')
| -rw-r--r-- | arch/xtensa/include/asm/regs.h | 55 |
1 files changed, 9 insertions, 46 deletions
diff --git a/arch/xtensa/include/asm/regs.h b/arch/xtensa/include/asm/regs.h index a3075b12aff1..8a8aa61ccc8d 100644 --- a/arch/xtensa/include/asm/regs.h +++ b/arch/xtensa/include/asm/regs.h @@ -27,52 +27,15 @@ /* Special registers. */ -#define LBEG 0 -#define LEND 1 -#define LCOUNT 2 -#define SAR 3 -#define BR 4 -#define SCOMPARE1 12 -#define ACCHI 16 -#define ACCLO 17 -#define MR 32 -#define WINDOWBASE 72 -#define WINDOWSTART 73 -#define PTEVADDR 83 -#define RASID 90 -#define ITLBCFG 91 -#define DTLBCFG 92 -#define IBREAKENABLE 96 -#define DDR 104 -#define IBREAKA 128 -#define DBREAKA 144 -#define DBREAKC 160 -#define EPC 176 -#define EPC_1 177 -#define DEPC 192 -#define EPS 192 -#define EPS_1 193 -#define EXCSAVE 208 -#define EXCSAVE_1 209 -#define INTERRUPT 226 -#define INTENABLE 228 -#define PS 230 -#define THREADPTR 231 -#define EXCCAUSE 232 -#define DEBUGCAUSE 233 -#define CCOUNT 234 -#define PRID 235 -#define ICOUNT 236 -#define ICOUNTLEVEL 237 -#define EXCVADDR 238 -#define CCOMPARE 240 -#define MISC_SR 244 - -/* Special names for read-only and write-only interrupt registers. */ - -#define INTREAD 226 -#define INTSET 226 -#define INTCLEAR 227 +#define SREG_MR 32 +#define SREG_IBREAKA 128 +#define SREG_DBREAKA 144 +#define SREG_DBREAKC 160 +#define SREG_EPC 176 +#define SREG_EPS 192 +#define SREG_EXCSAVE 208 +#define SREG_CCOMPARE 240 +#define SREG_MISC 244 /* EXCCAUSE register fields */ |
