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authorDave Airlie <airlied@redhat.com>2014-01-20 10:21:54 +1000
committerDave Airlie <airlied@redhat.com>2014-01-20 10:21:54 +1000
commitcfd72a4c2089aa3938f37281a34d6eb3306d5fd8 (patch)
treee63f6df423aeb59d1ea5f7af3597d6718e75c335 /arch/x86/kernel/cpu
parent9354eafd893f45320a37da360e1728104e49cc2f (diff)
parent0d9d349d8788d30f3fc3bb39279c370f94d9dbec (diff)
downloadblackbird-op-linux-cfd72a4c2089aa3938f37281a34d6eb3306d5fd8.tar.gz
blackbird-op-linux-cfd72a4c2089aa3938f37281a34d6eb3306d5fd8.zip
Merge branch 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
drm-intel-next-2014-01-10: - final bits for runtime D3 on Haswell from Paul (now enabled fully) - parse the backlight modulation freq information in the VBT from Jani (but not yet used) - more watermark improvements from Ville for ilk-ivb and bdw - bugfixes for fastboot from Jesse - watermark fix for i830M (but not yet everything) - vlv vga hotplug w/a (Imre) - piles of other small improvements, cleanups and fixes all over Note that the pull request includes a backmerge of the last drm-fixes pulled into Linus' tree - things where getting a bit too messy. So the shortlog also contains a bunch of patches from Linus tree. Please yell if you want me to frob it for you a bit. * 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel: (609 commits) drm/i915/bdw: make sure south port interrupts are enabled properly v2 drm/i915: Include more information in disabled hotplug interrupt warning drm/i915: Only complain about a rogue hotplug IRQ after disabling drm/i915: Only WARN about a stuck hotplug irq ONCE drm/i915: s/hotplugt_status_gen4/hotplug_status_g4x/
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r--arch/x86/kernel/cpu/intel.c3
-rw-r--r--arch/x86/kernel/cpu/perf_event.h15
2 files changed, 14 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index dc1ec0dff939..ea04b342c026 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -387,7 +387,8 @@ static void init_intel(struct cpuinfo_x86 *c)
set_cpu_cap(c, X86_FEATURE_PEBS);
}
- if (c->x86 == 6 && c->x86_model == 29 && cpu_has_clflush)
+ if (c->x86 == 6 && cpu_has_clflush &&
+ (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
set_cpu_cap(c, X86_FEATURE_CLFLUSH_MONITOR);
#ifdef CONFIG_X86_64
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index fd00bb29425d..c1a861829d81 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -262,11 +262,20 @@ struct cpu_hw_events {
__EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_ST_HSW)
-#define EVENT_CONSTRAINT_END \
- EVENT_CONSTRAINT(0, 0, 0)
+/*
+ * We define the end marker as having a weight of -1
+ * to enable blacklisting of events using a counter bitmask
+ * of zero and thus a weight of zero.
+ * The end marker has a weight that cannot possibly be
+ * obtained from counting the bits in the bitmask.
+ */
+#define EVENT_CONSTRAINT_END { .weight = -1 }
+/*
+ * Check for end marker with weight == -1
+ */
#define for_each_event_constraint(e, c) \
- for ((e) = (c); (e)->weight; (e)++)
+ for ((e) = (c); (e)->weight != -1; (e)++)
/*
* Extra registers for specific events.
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