diff options
author | Matthias-Christian Ott <ott@mirix.org> | 2009-02-20 20:52:17 -0500 |
---|---|---|
committer | Dave Jones <davej@redhat.com> | 2009-02-24 22:47:32 -0500 |
commit | 199785eac892a1fa1b71cc22bec58e8b156d9311 (patch) | |
tree | 8e200f33cba62afb37a36d297b2a0224c7b8345b /arch/x86/kernel/cpu/cpufreq/speedstep-lib.c | |
parent | 0cb8bc256093e716d2a0a4a721f36c625a3f7634 (diff) | |
download | blackbird-op-linux-199785eac892a1fa1b71cc22bec58e8b156d9311.tar.gz blackbird-op-linux-199785eac892a1fa1b71cc22bec58e8b156d9311.zip |
[CPUFREQ] p4-clockmod reports wrong frequency.
http://bugzilla.kernel.org/show_bug.cgi?id=10968
[ Updated for current tree, and fixed compile failure
when p4-clockmod was built modular -- davej]
From: Matthias-Christian Ott <ott@mirix.org>
Signed-off-by: Dominik Brodowski <linux@brodo.de>
Signed-off-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'arch/x86/kernel/cpu/cpufreq/speedstep-lib.c')
-rw-r--r-- | arch/x86/kernel/cpu/cpufreq/speedstep-lib.c | 34 |
1 files changed, 20 insertions, 14 deletions
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c index 55c696daa05c..2e3c6862657b 100644 --- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c +++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c @@ -16,6 +16,7 @@ #include <linux/slab.h> #include <asm/msr.h> +#include <asm/tsc.h> #include "speedstep-lib.h" #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \ @@ -178,6 +179,15 @@ static unsigned int pentium4_get_frequency(void) u32 msr_lo, msr_hi, mult; unsigned int fsb = 0; unsigned int ret; + u8 fsb_code; + + /* Pentium 4 Model 0 and 1 do not have the Core Clock Frequency + * to System Bus Frequency Ratio Field in the Processor Frequency + * Configuration Register of the MSR. Therefore the current + * frequency cannot be calculated and has to be measured. + */ + if (c->x86_model < 2) + return cpu_khz; rdmsr(0x2c, msr_lo, msr_hi); @@ -188,21 +198,17 @@ static unsigned int pentium4_get_frequency(void) * revision #12 in Table B-1: MSRs in the Pentium 4 and * Intel Xeon Processors, on page B-4 and B-5. */ - if (c->x86_model < 2) + fsb_code = (msr_lo >> 16) & 0x7; + switch (fsb_code) { + case 0: fsb = 100 * 1000; - else { - u8 fsb_code = (msr_lo >> 16) & 0x7; - switch (fsb_code) { - case 0: - fsb = 100 * 1000; - break; - case 1: - fsb = 13333 * 10; - break; - case 2: - fsb = 200 * 1000; - break; - } + break; + case 1: + fsb = 13333 * 10; + break; + case 2: + fsb = 200 * 1000; + break; } if (!fsb) |