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authorLinus Torvalds <torvalds@linux-foundation.org>2011-05-19 18:10:17 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-05-19 18:10:17 -0700
commit5765040ebfc9a28d9dcfaaaaf3d25840d922de96 (patch)
tree6fd0c9950beb3c9730ede405269c9a47bbcbf877 /arch/x86/include
parent08839ff8276bd1ba0ce8b2d595f9fe62a5b07210 (diff)
parentde5397ad5b9ad22e2401c4dacdf1bb3b19c05679 (diff)
downloadblackbird-op-linux-5765040ebfc9a28d9dcfaaaaf3d25840d922de96.tar.gz
blackbird-op-linux-5765040ebfc9a28d9dcfaaaaf3d25840d922de96.zip
Merge branch 'x86-smep-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-smep-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, cpu: Enable/disable Supervisor Mode Execution Protection x86, cpu: Add SMEP CPU feature in CR4 x86, cpufeature: Add cpufeature flag for SMEP
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/cpufeature.h1
-rw-r--r--arch/x86/include/asm/processor-flags.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 30afb465d486..5dc6acc98dbd 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -195,6 +195,7 @@
/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
#define X86_FEATURE_FSGSBASE (9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/
+#define X86_FEATURE_SMEP (9*32+ 7) /* Supervisor Mode Execution Protection */
#define X86_FEATURE_ERMS (9*32+ 9) /* Enhanced REP MOVSB/STOSB */
#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/processor-flags.h
index a898a2b6e10c..59ab4dffa377 100644
--- a/arch/x86/include/asm/processor-flags.h
+++ b/arch/x86/include/asm/processor-flags.h
@@ -60,6 +60,7 @@
#define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */
#define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */
#define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */
+#define X86_CR4_SMEP 0x00100000 /* enable SMEP support */
/*
* x86-64 Task Priority Register, CR8
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