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authorAndreas Herrmann <andreas.herrmann3@amd.com>2010-09-17 18:07:45 +0200
committerH. Peter Anvin <hpa@linux.intel.com>2010-09-17 13:25:56 -0700
commit3518dd14ca888085797ca8d3a9e11c8ef9e7ae68 (patch)
treec5812562f32cacffc1bf2b95f4e5242dea1e1c78 /arch/x86/include/asm/k8.h
parent509344b8b4d365b7ff3bce97198d83a57b7c3f31 (diff)
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x86, cacheinfo: Fix dependency of AMD L3 CID
L3 cache index disable code uses PCI accesses to AMD northbridge functions. Currently the code is #ifdef CONFIG_CPU_SUP_AMD. But it should be #if (defined(CONFIG_CPU_SUP_AMD) && defined(CONFIG_PCI)) which in the end is a dependency to K8_NB. Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> LKML-Reference: <20100917160744.GF4958@loge.amd.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/include/asm/k8.h')
0 files changed, 0 insertions, 0 deletions
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