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| author | David S. Miller <davem@sunset.davemloft.net> | 2006-02-11 12:21:20 -0800 |
|---|---|---|
| committer | David S. Miller <davem@sunset.davemloft.net> | 2006-03-20 01:12:23 -0800 |
| commit | 459b6e621e0e15315c25bac47fa7113e5818d45d (patch) | |
| tree | 4bbff0ec1dafb7fba8b247c84ad708f54cc687fe /arch/sparc64/kernel/sun4v_tlb_miss.S | |
| parent | fd05068d7b22b64211f9202aa67ad44b51d44242 (diff) | |
| download | blackbird-op-linux-459b6e621e0e15315c25bac47fa7113e5818d45d.tar.gz blackbird-op-linux-459b6e621e0e15315c25bac47fa7113e5818d45d.zip | |
[SPARC64]: Fix some SUN4V TLB miss bugs.
Code patching did not sign extend negative branch
offsets correctly.
Kernel TLB miss path needs patching and %g4 register
preservation in order to handle SUN4V correctly.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/sun4v_tlb_miss.S')
| -rw-r--r-- | arch/sparc64/kernel/sun4v_tlb_miss.S | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/sparc64/kernel/sun4v_tlb_miss.S b/arch/sparc64/kernel/sun4v_tlb_miss.S index f7129137f9a4..597359ced233 100644 --- a/arch/sparc64/kernel/sun4v_tlb_miss.S +++ b/arch/sparc64/kernel/sun4v_tlb_miss.S @@ -96,7 +96,7 @@ sun4v_dtlb_miss: /* Load UTSB reg into %g1. */ mov SCRATCHPAD_UTSBREG1, %g1 - ldxa [%g1 + %g1] ASI_SCRATCHPAD, %g1 + ldxa [%g1] ASI_SCRATCHPAD, %g1 LOAD_DTLB_INFO(%g2, %g4, %g5) COMPUTE_TAG_TARGET(%g6, %g4, %g5, %g3, kvmap_dtlb_4v) @@ -149,14 +149,19 @@ sun4v_dtlb_prot: * SCRATCHPAD_MMU_MISS contents in %g2. */ sun4v_itsb_miss: - ba,pt %xcc, sun4v_tsb_miss_common + mov SCRATCHPAD_UTSBREG1, %g1 + ldxa [%g1] ASI_SCRATCHPAD, %g1 + brz,pn %g5, kvmap_itlb_4v mov FAULT_CODE_ITLB, %g3 /* Called from trap table with TAG TARGET placed into * %g6 and SCRATCHPAD_UTSBREG1 contents in %g1. */ sun4v_dtsb_miss: - mov FAULT_CODE_DTLB, %g3 + mov SCRATCHPAD_UTSBREG1, %g1 + ldxa [%g1] ASI_SCRATCHPAD, %g1 + brz,pn %g5, kvmap_dtlb_4v + mov FAULT_CODE_DTLB, %g3 /* Create TSB pointer into %g1. This is something like: * @@ -312,7 +317,8 @@ sun4v_stdfmna: or %g2, %lo(OLD), %g2; \ sub %g1, %g2, %g1; \ sethi %hi(BRANCH_ALWAYS), %g3; \ - srl %g1, 2, %g1; \ + sll %g1, 11, %g1; \ + srl %g1, 11 + 2, %g1; \ or %g3, %lo(BRANCH_ALWAYS), %g3; \ or %g3, %g1, %g3; \ stw %g3, [%g2]; \ |
