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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-16 10:32:02 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-16 10:32:02 -0700
commitb91cba52e9b7b3f1c0037908a192d93a869ca9e5 (patch)
treebbce7f323c8f52b308af5a152673a75b3e445360 /arch/sh/mm/Kconfig
parent98283bb49c6c8c070ebde9f47489d3e9a83c1323 (diff)
parente509ac4bbc661052dc73a2e8138800ba77d4ecb9 (diff)
downloadblackbird-op-linux-b91cba52e9b7b3f1c0037908a192d93a869ca9e5.tar.gz
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Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (68 commits) sh: sh-rtc support for SH7709. sh: Revert __xdiv64_32 size change. sh: Update r7785rp defconfig. sh: Export div symbols for GCC 4.2 and ST GCC. sh: fix race in parallel out-of-tree build sh: Kill off dead mach.c for hp6xx. sh: hd64461.h cleanup and added comments. sh: Update the alignment when 4K stacks are used. sh: Add a .bss.page_aligned section for 4K stacks. sh: Don't let SH-4A clobber SH-4 CFLAGS. sh: Add parport stub for SuperIO ports. sh: Drop -Wa,-dsp for DSP tuning. sh: Update dreamcast defconfig. fb: pvr2fb: A few more __devinit annotations for PCI. fb: pvr2fb: Fix up section mismatch warnings. sh: Select IPR-IRQ for SH7091. sh: Correct __xdiv64_32/div64_32 return value size. sh: Fix timer-tmu build for SH-3. sh: Add cpu and mach links to CLEAN_FILES. sh: Preliminary support for the SH-X3 CPU. ...
Diffstat (limited to 'arch/sh/mm/Kconfig')
-rw-r--r--arch/sh/mm/Kconfig87
1 files changed, 57 insertions, 30 deletions
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 253346d7b316..28d79a474cde 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -1,5 +1,3 @@
-menu "Processor selection"
-
#
# Processor families
#
@@ -38,27 +36,31 @@ config CPU_SUBTYPE_ST40
config CPU_SHX2
bool
+config CPU_SHX3
+ bool
+
+choice
+ prompt "Processor sub-type selection"
+
#
# Processor subtypes
#
-comment "SH-2 Processor Support"
-
-config CPU_SUBTYPE_SH7604
- bool "Support SH7604 processor"
- select CPU_SH2
+# SH-2 Processor Support
config CPU_SUBTYPE_SH7619
bool "Support SH7619 processor"
select CPU_SH2
+ select CPU_HAS_IPR_IRQ
-comment "SH-2A Processor Support"
+# SH-2A Processor Support
config CPU_SUBTYPE_SH7206
bool "Support SH7206 processor"
select CPU_SH2A
+ select CPU_HAS_IPR_IRQ
-comment "SH-3 Processor Support"
+# SH-3 Processor Support
config CPU_SUBTYPE_SH7300
bool "Support SH7300 processor"
@@ -113,7 +115,7 @@ config CPU_SUBTYPE_SH7712
help
Select SH7712 if you have a SH3-DSP SH7712 CPU.
-comment "SH-4 Processor Support"
+# SH-4 Processor Support
config CPU_SUBTYPE_SH7750
bool "Support SH7750 processor"
@@ -125,7 +127,7 @@ config CPU_SUBTYPE_SH7750
config CPU_SUBTYPE_SH7091
bool "Support SH7091 processor"
select CPU_SH4
- select CPU_SUBTYPE_SH7750
+ select CPU_HAS_IPR_IRQ
help
Select SH7091 if you have an SH-4 based Sega device (such as
the Dreamcast, Naomi, and Naomi 2).
@@ -133,13 +135,11 @@ config CPU_SUBTYPE_SH7091
config CPU_SUBTYPE_SH7750R
bool "Support SH7750R processor"
select CPU_SH4
- select CPU_SUBTYPE_SH7750
select CPU_HAS_IPR_IRQ
config CPU_SUBTYPE_SH7750S
bool "Support SH7750S processor"
select CPU_SH4
- select CPU_SUBTYPE_SH7750
select CPU_HAS_IPR_IRQ
config CPU_SUBTYPE_SH7751
@@ -153,7 +153,6 @@ config CPU_SUBTYPE_SH7751
config CPU_SUBTYPE_SH7751R
bool "Support SH7751R processor"
select CPU_SH4
- select CPU_SUBTYPE_SH7751
select CPU_HAS_IPR_IRQ
config CPU_SUBTYPE_SH7760
@@ -166,7 +165,7 @@ config CPU_SUBTYPE_SH4_202
bool "Support SH4-202 processor"
select CPU_SH4
-comment "ST40 Processor Support"
+# ST40 Processor Support
config CPU_SUBTYPE_ST40STB1
bool "Support ST40STB1/ST40RA processors"
@@ -181,7 +180,7 @@ config CPU_SUBTYPE_ST40GX1
help
Select ST40GX1 if you have a ST40GX1 CPU.
-comment "SH-4A Processor Support"
+# SH-4A Processor Support
config CPU_SUBTYPE_SH7770
bool "Support SH7770 processor"
@@ -198,7 +197,13 @@ config CPU_SUBTYPE_SH7785
select CPU_SHX2
select CPU_HAS_INTC2_IRQ
-comment "SH4AL-DSP Processor Support"
+config CPU_SUBTYPE_SHX3
+ bool "Support SH-X3 processor"
+ select CPU_SH4A
+ select CPU_SHX3
+ select CPU_HAS_INTC2_IRQ
+
+# SH4AL-DSP Processor Support
config CPU_SUBTYPE_SH73180
bool "Support SH73180 processor"
@@ -213,8 +218,10 @@ config CPU_SUBTYPE_SH7722
select CPU_SH4AL_DSP
select CPU_SHX2
select CPU_HAS_IPR_IRQ
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
-endmenu
+endchoice
menu "Memory management options"
@@ -266,7 +273,7 @@ config MEMORY_SIZE
config 32BIT
bool "Support 32-bit physical addressing through PMB"
- depends on CPU_SH4A && MMU && (!X2TLB || BROKEN)
+ depends on MMU && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
default y
help
If you say Y here, physical addressing will be extended to
@@ -295,6 +302,17 @@ config VSYSCALL
For systems with an MMU that can afford to give up a page,
(the default value) say Y.
+config NUMA
+ bool "Non Uniform Memory Access (NUMA) Support"
+ depends on MMU && SYS_SUPPORTS_NUMA && EXPERIMENTAL
+ default n
+ help
+ Some SH systems have many various memories scattered around
+ the address space, each with varying latencies. This enables
+ support for these blocks by binding them to nodes and allowing
+ memory policies to be used for prioritizing and controlling
+ allocation behaviour.
+
config NODES_SHIFT
int
default "1"
@@ -302,14 +320,34 @@ config NODES_SHIFT
config ARCH_FLATMEM_ENABLE
def_bool y
+ depends on !NUMA
+
+config ARCH_SPARSEMEM_ENABLE
+ def_bool y
+ select SPARSEMEM_STATIC
+
+config ARCH_SPARSEMEM_DEFAULT
+ def_bool y
config MAX_ACTIVE_REGIONS
int
+ default "2" if (CPU_SUBTYPE_SH7722 && SPARSEMEM)
default "1"
config ARCH_POPULATES_NODE_MAP
def_bool y
+config ARCH_SELECT_MEMORY_MODEL
+ def_bool y
+
+config ARCH_ENABLE_MEMORY_HOTPLUG
+ def_bool y
+ depends on SPARSEMEM
+
+config ARCH_MEMORY_PROBE
+ def_bool y
+ depends on MEMORY_HOTPLUG
+
choice
prompt "Kernel page size"
default PAGE_SIZE_4KB
@@ -394,15 +432,4 @@ config SH_WRITETHROUGH
If unsure, say N.
-config SH_OCRAM
- bool "Operand Cache RAM (OCRAM) support"
- help
- Selecting this option will automatically tear down the number of
- sets in the dcache by half, which in turn exposes a memory range.
-
- The addresses for the OC RAM base will vary according to the
- processor version. Consult vendor documentation for specifics.
-
- If unsure, say N.
-
endmenu
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