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| author | David S. Miller <davem@davemloft.net> | 2008-04-03 14:33:42 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-04-03 14:33:42 -0700 |
| commit | 3bb5da3837cc1aa17736b05139c9a22c3794851a (patch) | |
| tree | c92d5684a866542b1cb20641607ac1643ce03a47 /arch/sh/kernel/cpu | |
| parent | 7feb49c82a74bc7c091b8ab2a3f96baa33d08ece (diff) | |
| parent | 9597362d354f8655ece324b01d0c640a0e99c077 (diff) | |
| download | blackbird-op-linux-3bb5da3837cc1aa17736b05139c9a22c3794851a.tar.gz blackbird-op-linux-3bb5da3837cc1aa17736b05139c9a22c3794851a.zip | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
Diffstat (limited to 'arch/sh/kernel/cpu')
| -rw-r--r-- | arch/sh/kernel/cpu/sh2/entry.S | 1 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh2a/fpu.c | 1 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4/fpu.c | 1 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh5/fpu.c | 1 |
4 files changed, 3 insertions, 1 deletions
diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S index 7a26569e7956..0fc89069d8c7 100644 --- a/arch/sh/kernel/cpu/sh2/entry.S +++ b/arch/sh/kernel/cpu/sh2/entry.S @@ -267,7 +267,6 @@ ENTRY(sh_bios_handler) ENTRY(address_error_trap_handler) mov r15,r4 ! regs - add #4,r4 mov #OFF_PC,r0 mov.l @(r0,r15),r6 ! pc mov.l 1f,r0 diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c index ff99562456fb..5627c0b3ffa8 100644 --- a/arch/sh/kernel/cpu/sh2a/fpu.c +++ b/arch/sh/kernel/cpu/sh2a/fpu.c @@ -13,6 +13,7 @@ #include <linux/signal.h> #include <asm/processor.h> #include <asm/io.h> +#include <asm/fpu.h> /* The PR (precision) bit in the FP Status Register must be clear when * an frchg instruction is executed, otherwise the instruction is undefined. diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c index 817f9939cda6..8020796139f1 100644 --- a/arch/sh/kernel/cpu/sh4/fpu.c +++ b/arch/sh/kernel/cpu/sh4/fpu.c @@ -16,6 +16,7 @@ #include <asm/cpu/fpu.h> #include <asm/processor.h> #include <asm/system.h> +#include <asm/fpu.h> /* The PR (precision) bit in the FP Status Register must be clear when * an frchg instruction is executed, otherwise the instruction is undefined. diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c index 30b76a94abf2..dd4f51ffb50e 100644 --- a/arch/sh/kernel/cpu/sh5/fpu.c +++ b/arch/sh/kernel/cpu/sh5/fpu.c @@ -17,6 +17,7 @@ #include <asm/processor.h> #include <asm/user.h> #include <asm/io.h> +#include <asm/fpu.h> /* * Initially load the FPU with signalling NANS. This bit pattern |
