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author | Wim Van Sebroeck <wim@iguana.be> | 2007-05-11 19:03:13 +0000 |
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committer | Wim Van Sebroeck <wim@iguana.be> | 2007-05-11 19:03:13 +0000 |
commit | 5c34202b8bf942da411b6599668a76b07449bbfd (patch) | |
tree | 5719c361321eaddc8e4f1b0c8a7994f0e9a6fdd3 /arch/sh/drivers/pci/pci-sh7780.h | |
parent | 0d4804b31f91cfbcff6d62af0bc09a893a1c8ae0 (diff) | |
parent | 1f8a6b658a943b4f04a1fc7b3a420360202c86cd (diff) | |
download | blackbird-op-linux-5c34202b8bf942da411b6599668a76b07449bbfd.tar.gz blackbird-op-linux-5c34202b8bf942da411b6599668a76b07449bbfd.zip |
Merge /pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/sh/drivers/pci/pci-sh7780.h')
-rw-r--r-- | arch/sh/drivers/pci/pci-sh7780.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h index f02d2180a4bc..00d12d0f8c1f 100644 --- a/arch/sh/drivers/pci/pci-sh7780.h +++ b/arch/sh/drivers/pci/pci-sh7780.h @@ -14,8 +14,9 @@ /* Platform Specific Values */ #define SH7780_VENDOR_ID 0x1912 -#define SH7780_DEVICE_ID 0x0002 #define SH7781_DEVICE_ID 0x0001 +#define SH7780_DEVICE_ID 0x0002 +#define SH7785_DEVICE_ID 0x0007 /* SH7780 Control Registers */ #define SH7780_PCI_VCR0 0xFE000000 @@ -65,6 +66,22 @@ #define SH7780_PCIPMCSR_BSE 0x046 #define SH7780_PCICDD 0x047 +#define SH7780_PCICR 0x100 /* PCI Control Register */ +#define SH7780_PCILSR 0x104 /* PCI Local Space Register0 */ +#define SH7780_PCILSR1 0x108 /* PCI Local Space Register1 */ +#define SH7780_PCILAR0 0x10C /* PCI Local Address Register1 */ +#define SH7780_PCILAR1 0x110 /* PCI Local Address Register1 */ +#define SH7780_PCIIR 0x114 /* PCI Interrupt Register */ +#define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */ +#define SH7780_PCIAIR 0x11C /* Error Address Register */ +#define SH7780_PCICIR 0x120 /* Error Command/Data Register */ +#define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */ +#define SH7780_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ +#define SH7780_PCIBMIR 0x138 /* Error Bus Master Register */ +#define SH7780_PCIPAR 0x1C0 /* PIO Address Register */ +#define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ +#define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ + #define SH7780_PCIMBR0 0x1E0 #define SH7780_PCIMBMR0 0x1E4 #define SH7780_PCIMBR2 0x1F0 |