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authorClaudiu Manoil <claudiu.manoil@freescale.com>2012-01-31 12:15:20 +0200
committerKumar Gala <galak@kernel.crashing.org>2012-03-16 14:50:44 -0500
commitf7bba2aaff8d034dcac3dab6df2fe6e8a3b3e81d (patch)
treeba277657cd5a0fbcd0bf567c46464762ea02656a /arch/powerpc
parente4399461bdf4d230129c99f785ebe6814269427b (diff)
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powerpc/85xx: Add missing config option for CACHE SRAM code
fsl_85xx_l2ctlr.o and fsl_85xx_cache_sram.o are built only if CONFIG_FSL_85XX_CACHE_SRAM is defined. The driver that qualifies and wants to make use of the CACHE SRAM's exported API (i.e. a freescale net driver) should (be able to) select this config option. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 4c91ea97d885..fd6f3c06a0dc 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -14,6 +14,15 @@ if FSL_SOC_BOOKE
if PPC32
+config FSL_85XX_CACHE_SRAM
+ bool
+ select PPC_LIB_RHEAP
+ help
+ When selected, this option enables cache-sram support
+ for memory allocation on P1/P2 QorIQ platforms.
+ cache-sram-size and cache-sram-offset kernel boot
+ parameters should be passed when this option is enabled.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
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