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authorKumar Gala <galak@kernel.crashing.org>2009-03-19 03:55:40 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-03-24 13:47:31 +1100
commiteb3436a0139a651a39dbb37a75b10a2cccd00ad5 (patch)
treeb3925f180d0a7e80b76476694db42bb338db4d6c /arch/powerpc/kernel/crash.c
parent00fcb14703d8322a9c66cb3f48b5c49ac7d43f0a (diff)
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powerpc/mm: Used free register to save a few cycles in SW TLB miss handling
Now that r0 is free we can keep the value of I/DMISS in r3 and not reload it before doing the tlbli/d. This saves us a few cycles in the fast path case. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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