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| author | Alexander Graf <agraf@suse.de> | 2014-04-17 13:25:33 +0200 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-05-30 14:26:17 +0200 |
| commit | 8f20a3ab27342171462781cef4637c18d3dbc5f8 (patch) | |
| tree | 9f7320513c255bd7e9bd5f0e707a26d1b2453fcd /arch/powerpc/include/asm/reg_booke.h | |
| parent | 07fec1c2e75ef2f55d7a211414b0d63e185e84f0 (diff) | |
| download | blackbird-op-linux-8f20a3ab27342171462781cef4637c18d3dbc5f8.tar.gz blackbird-op-linux-8f20a3ab27342171462781cef4637c18d3dbc5f8.zip | |
KVM: PPC: E500: Add dcbtls emulation
The dcbtls instruction is able to lock data inside the L1 cache.
We don't want to give the guest actual access to hardware cache locks,
as that could influence other VMs on the same system. But we can tell
the guest that its locking attempt failed.
By implementing the instruction we at least don't give the guest a
program exception which it definitely does not expect.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch/powerpc/include/asm/reg_booke.h')
| -rw-r--r-- | arch/powerpc/include/asm/reg_booke.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 163c3b05a76e..464f1089b532 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -583,6 +583,7 @@ /* Bit definitions for L1CSR0. */ #define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */ +#define L1CSR0_CUL 0x00000400 /* Data Cache Unable to Lock */ #define L1CSR0_CLFC 0x00000100 /* Cache Lock Bits Flash Clear */ #define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ #define L1CSR0_CFI 0x00000002 /* Cache Flash Invalidate */ |
