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authorWang Dongsheng <dongsheng.wang@freescale.com>2014-01-07 14:26:42 +0800
committerScott Wood <scottwood@freescale.com>2014-01-10 17:18:36 -0600
commit297649b9f516a840d56bc2df6dda5a6f9c50cea5 (patch)
treec8baf347359de58f21cdcecc44333d4b741a08f1 /arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
parentbe2019816e4dcdb02493da332b65a8b68b70106c (diff)
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powerpc/dts: fix lbc lack of error interrupt
P1020, P1021, P1022, P1023 when the lbc get error, the error interrupt will be triggered. The corresponding interrupt is internal IRQ0. So system have to process the lbc IRQ0 interrupt. The corresponding lbc general interrupt is internal IRQ3. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> [scottwood@freescale.com: bracketed individual list elements] Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/boot/dts/fsl/p1021si-post.dtsi')
-rw-r--r--arch/powerpc/boot/dts/fsl/p1021si-post.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
index adb82fd9057f..407cb5fd0f5b 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -36,7 +36,8 @@
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
- interrupts = <19 2 0 0>;
+ interrupts = <19 2 0 0>,
+ <16 2 0 0>;
};
/* controller at 0x9000 */
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