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| author | Yoichi Yuasa <yuasa@linux-mips.org> | 2009-07-08 15:08:19 +0900 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2009-08-03 17:52:41 +0100 |
| commit | 78fe01a5a80da4621321a1dc199c3a0875e2fbb0 (patch) | |
| tree | 500aa5612cc08d0b508100e46e2e7b0b0c44198e /arch/mips | |
| parent | 7d35cdc07dd26eb6667f66f8e2f43f833a926ecf (diff) | |
| download | blackbird-op-linux-78fe01a5a80da4621321a1dc199c3a0875e2fbb0.tar.gz blackbird-op-linux-78fe01a5a80da4621321a1dc199c3a0875e2fbb0.zip | |
MIPS: MIPSsim: Fix unbalance brace in mipssim get_c0_compare_int()
cc1: warnings being treated as errors
arch/mips/mipssim/sim_time.c: In function 'get_c0_compare_int':
arch/mips/mipssim/sim_time.c:103: warning: ISO C90 forbids mixed declarations and code
arch/mips/mipssim/sim_time.c:116: error: expected declaration or statement at end of input
make[1]: *** [arch/mips/mipssim/sim_time.o] Error 1
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/mipssim/sim_time.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c index 0cea932f1241..5492c42f7650 100644 --- a/arch/mips/mipssim/sim_time.c +++ b/arch/mips/mipssim/sim_time.c @@ -89,13 +89,13 @@ unsigned __cpuinit get_c0_compare_int(void) if (cpu_has_veic) { set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch); mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; - } else { -#endif - { - if (cpu_has_vint) - set_vi_handler(cp0_compare_irq, mips_timer_dispatch); - mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; + + return mips_cpu_timer_irq; } +#endif + if (cpu_has_vint) + set_vi_handler(cp0_compare_irq, mips_timer_dispatch); + mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; return mips_cpu_timer_irq; } |
