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author | Yoichi Yuasa <yuasa@linux-mips.org> | 2012-08-01 15:38:00 +0900 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2012-08-01 17:58:57 +0200 |
commit | 8551fb643ad6fe07f16d0825c8b6d99246024b9a (patch) | |
tree | 7c7475940223e1ca79ff0feed4ebf5053628e199 /arch/mips | |
parent | b902d9a98e2bd0d3a2b7ddf7bca850b7f853569a (diff) | |
download | blackbird-op-linux-8551fb643ad6fe07f16d0825c8b6d99246024b9a.tar.gz blackbird-op-linux-8551fb643ad6fe07f16d0825c8b6d99246024b9a.zip |
MIPS: AR7: Fix redefinition of clk_* by adding select HAVE_CLK
arch/mips/ar7/clock.c:420:5: error: redefinition of 'clk_enable'
include/linux/clk.h:295:19: note: previous definition of 'clk_enable' was here
arch/mips/ar7/clock.c:426:6: error: redefinition of 'clk_disable'
include/linux/clk.h:300:20: note: previous definition of 'clk_disable' was here
arch/mips/ar7/clock.c:431:15: error: redefinition of 'clk_get_rate'
include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here
arch/mips/ar7/clock.c:437:13: error: redefinition of 'clk_get'
include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here
arch/mips/ar7/clock.c:454:6: error: redefinition of 'clk_put'
include/linux/clk.h:291:20: note: previous definition of 'clk_put' was here
make[2]: *** [arch/mips/ar7/clock.o] Error 1
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips@linux-mips.org
Reviewed-by: John Crispin <blogic@openwrt.org>
Acked-by: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/4140/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index e3efc06e6409..45fdad419d82 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -77,6 +77,7 @@ config AR7 select SYS_SUPPORTS_ZBOOT_UART16550 select ARCH_REQUIRE_GPIOLIB select VLYNQ + select HAVE_CLK help Support for the Texas Instruments AR7 System-on-a-Chip family: TNETD7100, 7200 and 7300. |