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| author | Jean Delvare <khali@linux-fr.org> | 2008-07-14 22:38:33 +0200 |
|---|---|---|
| committer | Jean Delvare <khali@mahadeva.delvare> | 2008-07-14 22:38:33 +0200 |
| commit | cf898dc5e9dfd1487b28ca0176b68722f05d4d48 (patch) | |
| tree | 9369f5cc37f1013058187d79b370541e7ad8dc3e /arch/mips/sibyte | |
| parent | 2b73809d06649fe6c7f4294b051ca4934a34bb91 (diff) | |
| download | blackbird-op-linux-cf898dc5e9dfd1487b28ca0176b68722f05d4d48.tar.gz blackbird-op-linux-cf898dc5e9dfd1487b28ca0176b68722f05d4d48.zip | |
i2c-i801: Fix handling of error conditions
Move the check of pre-transaction and post-transaction conditions to
separate functions, and adjust them a bit. Having dedicated functions
for that ensures that errors are handled in a consistent way.
Bit HOST_BUSY of the status register is read-only, so writing to it is
certainly not going to clear it. If this bit is set then we simply
don't want to start the transaction, as it means that somebody else
(ACPI, SMM?) is already using the controller.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'arch/mips/sibyte')
0 files changed, 0 insertions, 0 deletions
