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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-03-14 10:29:27 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-05-15 17:49:02 +0200 |
| commit | c198441a3f3007752c551a32d5c426f48ae8712d (patch) | |
| tree | bc9f3079006990681c5c87139079ea0537b4ecbf /arch/mips/pci | |
| parent | d624bd3cf7835612b25b9ec8db4002624c2dbb32 (diff) | |
| download | blackbird-op-linux-c198441a3f3007752c551a32d5c426f48ae8712d.tar.gz blackbird-op-linux-c198441a3f3007752c551a32d5c426f48ae8712d.zip | |
MIPS: ath79: use io-accessor macros in pci-ar724x.c
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3491/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
| -rw-r--r-- | arch/mips/pci/pci-ar724x.c | 38 |
1 files changed, 24 insertions, 14 deletions
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c index 772d12c5fc9e..22f5e5bc4dfe 100644 --- a/arch/mips/pci/pci-ar724x.c +++ b/arch/mips/pci/pci-ar724x.c @@ -11,19 +11,19 @@ #include <linux/pci.h> #include <asm/mach-ath79/pci.h> -#define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) -#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) - -#define AR724X_PCI_DEV_BASE 0x14000000 +#define AR724X_PCI_CFG_BASE 0x14000000 +#define AR724X_PCI_CFG_SIZE 0x1000 #define AR724X_PCI_MEM_BASE 0x10000000 #define AR724X_PCI_MEM_SIZE 0x08000000 static DEFINE_SPINLOCK(ar724x_pci_lock); +static void __iomem *ar724x_pci_devcfg_base; static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, uint32_t *value) { unsigned long flags, addr, tval, mask; + void __iomem *base; if (devfn) return PCIBIOS_DEVICE_NOT_FOUND; @@ -31,25 +31,27 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, if (where & (size - 1)) return PCIBIOS_BAD_REGISTER_NUMBER; + base = ar724x_pci_devcfg_base; + spin_lock_irqsave(&ar724x_pci_lock, flags); switch (size) { case 1: addr = where & ~3; mask = 0xff000000 >> ((where % 4) * 8); - tval = reg_read(AR724X_PCI_DEV_BASE + addr); + tval = __raw_readl(base + addr); tval = tval & ~mask; *value = (tval >> ((4 - (where % 4))*8)); break; case 2: addr = where & ~3; mask = 0xffff0000 >> ((where % 4)*8); - tval = reg_read(AR724X_PCI_DEV_BASE + addr); + tval = __raw_readl(base + addr); tval = tval & ~mask; *value = (tval >> ((4 - (where % 4))*8)); break; case 4: - *value = reg_read(AR724X_PCI_DEV_BASE + where); + *value = __raw_readl(base + where); break; default: spin_unlock_irqrestore(&ar724x_pci_lock, flags); @@ -66,6 +68,7 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, uint32_t value) { unsigned long flags, tval, addr, mask; + void __iomem *base; if (devfn) return PCIBIOS_DEVICE_NOT_FOUND; @@ -73,27 +76,29 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, if (where & (size - 1)) return PCIBIOS_BAD_REGISTER_NUMBER; + base = ar724x_pci_devcfg_base; + spin_lock_irqsave(&ar724x_pci_lock, flags); switch (size) { case 1: - addr = (AR724X_PCI_DEV_BASE + where) & ~3; + addr = where & ~3; mask = 0xff000000 >> ((where % 4)*8); - tval = reg_read(addr); + tval = __raw_readl(base + addr); tval = tval & ~mask; tval |= (value << ((4 - (where % 4))*8)) & mask; - reg_write(addr, tval); + __raw_writel(tval, base + addr); break; case 2: - addr = (AR724X_PCI_DEV_BASE + where) & ~3; + addr = where & ~3; mask = 0xffff0000 >> ((where % 4)*8); - tval = reg_read(addr); + tval = __raw_readl(base + addr); tval = tval & ~mask; tval |= (value << ((4 - (where % 4))*8)) & mask; - reg_write(addr, tval); + __raw_writel(tval, base + addr); break; case 4: - reg_write((AR724X_PCI_DEV_BASE + where), value); + __raw_writel(value, (base + where)); break; default: spin_unlock_irqrestore(&ar724x_pci_lock, flags); @@ -133,6 +138,11 @@ static struct pci_controller ar724x_pci_controller = { int __init ar724x_pcibios_init(void) { + ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE, + AR724X_PCI_CFG_SIZE); + if (ar724x_pci_devcfg_base == NULL) + return -ENOMEM; + register_pci_controller(&ar724x_pci_controller); return PCIBIOS_SUCCESSFUL; |
