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authorJeffrey Deans <jeffrey.deans@imgtec.com>2014-07-17 09:20:58 +0100
committerRalf Baechle <ralf@linux-mips.org>2014-08-02 00:06:41 +0200
commit1c772b5664d9efa8d8d25b69b4ea8ae8996d6153 (patch)
tree9ff73849a38884773d291383298263d5e0b7d624 /arch/mips/mti-sead3/sead3-i2c.c
parent31521a7a64bc5df5202e479ee7ba8133993ab32a (diff)
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MIPS: Malta: Fix dispatching of GIC interrupts
The Malta malta_ipi_irqdispatch() routine now checks only IPI interrupts when handling IPIs. It could previously call do_IRQ() for non-IPIs, and also call do_IRQ() with an invalid IRQ number if there were no pending GIC interrupts when gic_get_int() was called. Signed-off-by: Jeffrey Deans <jeffrey.deans@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7377/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-sead3/sead3-i2c.c')
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