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authorChris Dearman <chris@mips.com>2006-06-20 17:15:20 +0100
committerRalf Baechle <ralf@linux-mips.org>2006-06-29 21:10:52 +0100
commit9318c51acd9689505850152cc98277a6d6f2d752 (patch)
tree7a8d49a377bed11ba2a45643c08af47f1222c51b /arch/mips/mm/Makefile
parentf7a849153be3b66326b52dce0d07896b56cb4cd7 (diff)
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[MIPS] MIPS32/MIPS64 secondary cache management
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/Makefile')
-rw-r--r--arch/mips/mm/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index 4a6220116c96..19e41fd186c4 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o
obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o
obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o
+obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o
#
# Choose one DMA coherency model
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