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authorAnton Altaparmakov <aia21@cantab.net>2006-03-23 14:50:51 +0000
committerAnton Altaparmakov <aia21@cantab.net>2006-03-23 14:50:51 +0000
commitb4d8d1a93c6ea042b29bb66fbb1cf6bc556c18f7 (patch)
tree030ef62361042d1a034087ad9a726db3b57bba72 /arch/mips/mips-boards
parentbb8047d3540affd6b8c2adac3fe792e07143be0f (diff)
parent2e6e33bab6e1996a5dec9108fb467b52b841e7a8 (diff)
downloadblackbird-op-linux-b4d8d1a93c6ea042b29bb66fbb1cf6bc556c18f7.tar.gz
blackbird-op-linux-b4d8d1a93c6ea042b29bb66fbb1cf6bc556c18f7.zip
Merge branch 'master' of /usr/src/ntfs-2.6/
Diffstat (limited to 'arch/mips/mips-boards')
-rw-r--r--arch/mips/mips-boards/generic/memory.c2
-rw-r--r--arch/mips/mips-boards/generic/mipsIRQ.S2
-rw-r--r--arch/mips/mips-boards/sim/sim_IRQ.c2
-rw-r--r--arch/mips/mips-boards/sim/sim_irq.S2
-rw-r--r--arch/mips/mips-boards/sim/sim_mem.c2
-rw-r--r--arch/mips/mips-boards/sim/sim_smp.c2
6 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index 2c8afd77a20b..ee5e70c95cf3 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -174,7 +174,7 @@ unsigned long __init prom_free_prom_memory(void)
while (addr < boot_mem_map.map[i].addr
+ boot_mem_map.map[i].size) {
ClearPageReserved(virt_to_page(__va(addr)));
- set_page_count(virt_to_page(__va(addr)), 1);
+ init_page_count(virt_to_page(__va(addr)));
free_page((unsigned long)__va(addr));
addr += PAGE_SIZE;
freed += PAGE_SIZE;
diff --git a/arch/mips/mips-boards/generic/mipsIRQ.S b/arch/mips/mips-boards/generic/mipsIRQ.S
index a397ecb872d6..ddd5c73a2971 100644
--- a/arch/mips/mips-boards/generic/mipsIRQ.S
+++ b/arch/mips/mips-boards/generic/mipsIRQ.S
@@ -98,7 +98,7 @@
and s0, s1
#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
- .set mips32
+ .set mips32
clz a0, s0
.set mips0
negu a0
diff --git a/arch/mips/mips-boards/sim/sim_IRQ.c b/arch/mips/mips-boards/sim/sim_IRQ.c
index 9987a85aabeb..5b84c7fe1022 100644
--- a/arch/mips/mips-boards/sim/sim_IRQ.c
+++ b/arch/mips/mips-boards/sim/sim_IRQ.c
@@ -96,7 +96,7 @@
andi a0, s0, CAUSEF_IP3 # delay slot, check hw1 interrupt
#else
beq a0, zero, 1f # delay slot, check hw3 interrupt
- andi a0, s0, CAUSEF_IP5
+ andi a0, s0, CAUSEF_IP5
#endif
/* Wheee, combined hardware level zero interrupt. */
diff --git a/arch/mips/mips-boards/sim/sim_irq.S b/arch/mips/mips-boards/sim/sim_irq.S
index 835f0387fcd4..da52297a2216 100644
--- a/arch/mips/mips-boards/sim/sim_irq.S
+++ b/arch/mips/mips-boards/sim/sim_irq.S
@@ -42,7 +42,7 @@
and s0, s1
#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
- .set mips32
+ .set mips32
clz a0, s0
.set mips0
negu a0
diff --git a/arch/mips/mips-boards/sim/sim_mem.c b/arch/mips/mips-boards/sim/sim_mem.c
index 0dbd7435bb2a..1ec4e75656bd 100644
--- a/arch/mips/mips-boards/sim/sim_mem.c
+++ b/arch/mips/mips-boards/sim/sim_mem.c
@@ -117,7 +117,7 @@ unsigned long __init prom_free_prom_memory(void)
while (addr < boot_mem_map.map[i].addr
+ boot_mem_map.map[i].size) {
ClearPageReserved(virt_to_page(__va(addr)));
- set_page_count(virt_to_page(__va(addr)), 1);
+ init_page_count(virt_to_page(__va(addr)));
free_page((unsigned long)__va(addr));
addr += PAGE_SIZE;
freed += PAGE_SIZE;
diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c
index 19824359f5de..a9f0c2bfe4ad 100644
--- a/arch/mips/mips-boards/sim/sim_smp.c
+++ b/arch/mips/mips-boards/sim/sim_smp.c
@@ -115,7 +115,7 @@ void prom_prepare_cpus(unsigned int max_cpus)
#ifdef CONFIG_MIPS_MT_SMTC
void mipsmt_prepare_cpus(int c);
/*
- * As noted above, we can assume a single CPU for now
+ * As noted above, we can assume a single CPU for now
* but it may be multithreaded.
*/
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