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authorWu Zhangjin <wuzhangjin@gmail.com>2009-10-16 14:17:19 +0800
committerRalf Baechle <ralf@linux-mips.org>2009-12-17 01:57:06 +0000
commite2fee5723bbda4a05c86f16a9d0f889a2c4ecede (patch)
tree7b6dade7ec51bc9d8ffe83c09070686bb3a278b1 /arch/mips/loongson/common/bonito-irq.c
parente8be5283881cb96bafb751e1f9ea34c4e6fc2845 (diff)
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MIPS: Bonito64: Make Loongson independent from Bonito64 code.
The built-in Loongson 2E/2F northbridge in is bonito64-compatible but not identical with it. To avoid influencing the original bonito64 support and make the loongson support more maintainable, it's better to separate the Bonito64 code from the Loongson code. This also prepares the kernel for the coming Loongson 2f machines family support. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: Zhang Le <r0bertz@gentoo.org> Cc: zhangfx@lemote.com, Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson/common/bonito-irq.c')
-rw-r--r--arch/mips/loongson/common/bonito-irq.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/loongson/common/bonito-irq.c b/arch/mips/loongson/common/bonito-irq.c
index 3e31e7ad713e..a1cbd110a6e4 100644
--- a/arch/mips/loongson/common/bonito-irq.c
+++ b/arch/mips/loongson/common/bonito-irq.c
@@ -17,13 +17,13 @@
static inline void bonito_irq_enable(unsigned int irq)
{
- BONITO_INTENSET = (1 << (irq - BONITO_IRQ_BASE));
+ LOONGSON_INTENSET = (1 << (irq - LOONGSON_IRQ_BASE));
mmiowb();
}
static inline void bonito_irq_disable(unsigned int irq)
{
- BONITO_INTENCLR = (1 << (irq - BONITO_IRQ_BASE));
+ LOONGSON_INTENCLR = (1 << (irq - LOONGSON_IRQ_BASE));
mmiowb();
}
@@ -44,8 +44,8 @@ void bonito_irq_init(void)
{
u32 i;
- for (i = BONITO_IRQ_BASE; i < BONITO_IRQ_BASE + 32; i++)
+ for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++)
set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq);
- setup_irq(BONITO_IRQ_BASE + 10, &dma_timeout_irqaction);
+ setup_irq(LOONGSON_IRQ_BASE + 10, &dma_timeout_irqaction);
}
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