diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2013-11-19 17:30:36 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-31 18:17:12 +0200 |
| commit | dab75dd956522ce19403c108f659ea9b339f2559 (patch) | |
| tree | 698c8bf58371ff0928397702efc068bfb848c645 /arch/mips/kernel/ptrace.c | |
| parent | 3351047f01fe012abbb585b400d1c51b57ed011d (diff) | |
| download | blackbird-op-linux-dab75dd956522ce19403c108f659ea9b339f2559.tar.gz blackbird-op-linux-dab75dd956522ce19403c108f659ea9b339f2559.zip | |
MIPS: Simplify ptrace_getfpregs FPU IR retrieval
All architecturally defined bits in the FPU implementation register
are read only & unchanging. It contains some implementation-defined
bits but the architecture manual states "This bits are explicitly not
intended to be used for mode control functions" which seems to provide
justification for viewing the register as a whole as unchanging. This
being the case we can simply re-use the value we read at boot rather
than having to re-read it later, and avoid the complexity which that
read entails.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6147/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/ptrace.c')
| -rw-r--r-- | arch/mips/kernel/ptrace.c | 25 |
1 files changed, 1 insertions, 24 deletions
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 94144bad5727..7271e5a83081 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -114,7 +114,6 @@ int ptrace_setregs(struct task_struct *child, __s64 __user *data) int ptrace_getfpregs(struct task_struct *child, __u32 __user *data) { int i; - unsigned int tmp; if (!access_ok(VERIFY_WRITE, data, 33 * 8)) return -EIO; @@ -130,29 +129,7 @@ int ptrace_getfpregs(struct task_struct *child, __u32 __user *data) } __put_user(child->thread.fpu.fcr31, data + 64); - - preempt_disable(); - if (cpu_has_fpu) { - unsigned int flags; - - if (cpu_has_mipsmt) { - unsigned int vpflags = dvpe(); - flags = read_c0_status(); - __enable_fpu(FPU_AS_IS); - __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp)); - write_c0_status(flags); - evpe(vpflags); - } else { - flags = read_c0_status(); - __enable_fpu(FPU_AS_IS); - __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp)); - write_c0_status(flags); - } - } else { - tmp = 0; - } - preempt_enable(); - __put_user(tmp, data + 65); + __put_user(current_cpu_data.fpu_id, data + 65); return 0; } |
