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authorDavid Daney <ddaney@caviumnetworks.com>2011-03-25 12:38:51 -0700
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 14:48:06 +0200
commit0c3263870f5f80cf7b6cb322bd8e708ce568d36b (patch)
treeb1e2ed41a6b9b10a16fdb290f6f54cb148ccaf1a /arch/mips/jz4740/clock.c
parenta458465641bf61a00f4ca54da7265202a911f975 (diff)
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MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and correctly enabling/disabling per-CPU interrupts. The hardware interrupt bit to irq number mapping is now done with a flexible map, instead of by bit twiddling the irq number. [ tglx: Adjusted to new irq_cpu_on/offline callbacks and __irq_set_affinity_lock ] Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: ralf@linux-mips.org LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/mips/jz4740/clock.c')
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