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authorSteven J. Hill <Steven.Hill@imgtec.com>2013-04-10 16:28:36 -0500
committerRalf Baechle <ralf@linux-mips.org>2013-05-09 17:55:20 +0200
commitdfa762e1c31c30607e4e5259f287dd3e174cbcc3 (patch)
treeb23b7335ac92646a29df85c897b5f4783944dc5b /arch/mips/include/asm
parent28ea215186d365408756577e9e612ee334e26f8e (diff)
downloadblackbird-op-linux-dfa762e1c31c30607e4e5259f287dd3e174cbcc3.tar.gz
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MIPS: Refactor GIC clocksource code.
Reorganize some of the GIC clocksource driver code. Below is a list of the various changes. * No longer select CSRC_GIC by default for Malta platform. * Limit choice for either the GIC or R4K clocksource, not both. * Change location in Makefile. * Created new 'gic_read_count' function in common 'irq-gic.c' file. * Change 'git_hpt_read' function in 'csrc-gic.c' to use new function. * Surround GIC specific code in Malta platform code with #ifdef's. * Only initialize the GIC clocksource if it was selected. Original code called it unconditionally if a GIC was found. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Diffstat (limited to 'arch/mips/include/asm')
-rw-r--r--arch/mips/include/asm/gic.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index f1a1e986d86b..6aa68ffad33c 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -359,6 +359,9 @@ struct gic_shared_intr_map {
/* Mapped interrupt to pin X, then GIC will generate the vector (X+1). */
#define GIC_PIN_TO_VEC_OFFSET (1)
+#include <linux/clocksource.h>
+#include <linux/irq.h>
+
extern unsigned int gic_present;
extern unsigned int gic_frequency;
extern unsigned long _gic_base;
@@ -372,6 +375,7 @@ extern void gic_init(unsigned long gic_base_addr,
extern void gic_clocksource_init(unsigned int);
extern unsigned int gic_get_int(void);
+extern cycle_t gic_read_count(void);
extern void gic_send_ipi(unsigned int intr);
extern unsigned int plat_ipi_call_int_xlate(unsigned int);
extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
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