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authorManuel Lauss <mano@roarinelk.homelinux.net>2008-12-21 09:26:23 +0100
committerRalf Baechle <ralf@linux-mips.org>2009-01-11 09:57:27 +0000
commit0c694de12b54fa96b9555e07603f567906ce21c8 (patch)
treec7528273c1d86069cb6e83bd2b36706f663f1eb2 /arch/mips/include/asm
parent779e7d41ad004946603da139da99ba775f74cb1c (diff)
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MIPS: Alchemy: RTC counter clocksource / clockevent support.
Add support for the 32 kHz counter1 (RTC) as clocksource / clockevent device. As a nice side effect, this also enables use of the 'wait' instruction for runtime idle power savings. If the counters aren't enabled/working properly, fall back on the cp0 counter clock code. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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