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author | Ingo Molnar <mingo@elte.hu> | 2009-03-26 18:29:40 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-03-26 18:29:40 +0100 |
commit | 5a54bd1307471c1cd0521402fe65e2057edcab2f (patch) | |
tree | 25fb6a543db4ccc11b6d5662ed2e7facfce39ae7 /arch/mips/include/asm/prefetch.h | |
parent | f9f35677d81adb0feedcd6e0e661784805c8facd (diff) | |
parent | 8e0ee43bc2c3e19db56a4adaa9a9b04ce885cd84 (diff) | |
download | blackbird-op-linux-5a54bd1307471c1cd0521402fe65e2057edcab2f.tar.gz blackbird-op-linux-5a54bd1307471c1cd0521402fe65e2057edcab2f.zip |
Merge commit 'v2.6.29' into core/header-fixes
Diffstat (limited to 'arch/mips/include/asm/prefetch.h')
-rw-r--r-- | arch/mips/include/asm/prefetch.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/prefetch.h b/arch/mips/include/asm/prefetch.h index 17850834ccb0..a56594f360ee 100644 --- a/arch/mips/include/asm/prefetch.h +++ b/arch/mips/include/asm/prefetch.h @@ -26,7 +26,7 @@ * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in * current versions due to erratum G105. * - * VR7701 only implements the Load prefetch. + * VR5500 (including VR5701 and VR7701) only implement load prefetch. * * Finally MIPS32 and MIPS64 implement all of the following hints. */ |