diff options
author | David Daney <david.daney@cavium.com> | 2011-11-22 14:46:49 +0000 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2011-12-07 22:03:28 +0000 |
commit | 751c9f684963d2a066a79d8022c0e79e1159291b (patch) | |
tree | 9a196a7c5bab11fe4e089e691e2f00593e51826a /arch/mips/cavium-octeon/executive | |
parent | 506d24be55d510c7ff79a0cdcabd00649b979bc9 (diff) | |
download | blackbird-op-linux-751c9f684963d2a066a79d8022c0e79e1159291b.tar.gz blackbird-op-linux-751c9f684963d2a066a79d8022c0e79e1159291b.zip |
MIPS: Oceton: Update model detection code for new chips.
Several newer chips were not covered, update the code to detect them.
This necessitates updating cvmx-mio-defs.h as well, because it has new
and required definitions.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2939/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon/executive')
-rw-r--r-- | arch/mips/cavium-octeon/executive/octeon-model.c | 119 |
1 files changed, 85 insertions, 34 deletions
diff --git a/arch/mips/cavium-octeon/executive/octeon-model.c b/arch/mips/cavium-octeon/executive/octeon-model.c index c8d35684504e..f4c1b36fdf65 100644 --- a/arch/mips/cavium-octeon/executive/octeon-model.c +++ b/arch/mips/cavium-octeon/executive/octeon-model.c @@ -4,7 +4,7 @@ * Contact: support@caviumnetworks.com * This file is part of the OCTEON SDK * - * Copyright (c) 2003-2008 Cavium Networks + * Copyright (c) 2003-2010 Cavium Networks * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as @@ -25,10 +25,6 @@ * Contact Cavium Networks for more information ***********************license end**************************************/ -/* - * File defining functions for working with different Octeon - * models. - */ #include <asm/octeon/octeon.h> /** @@ -69,11 +65,12 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer) char fuse_model[10]; uint32_t fuse_data = 0; - fus3.u64 = cvmx_read_csr(CVMX_L2D_FUS3); + fus3.u64 = 0; + if (!OCTEON_IS_MODEL(OCTEON_CN6XXX)) + fus3.u64 = cvmx_read_csr(CVMX_L2D_FUS3); fus_dat2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2); fus_dat3.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT3); - - num_cores = cvmx_octeon_num_cores(); + num_cores = cvmx_pop(cvmx_read_csr(CVMX_CIU_FUSE)); /* Make sure the non existent devices look disabled */ switch ((chip_id >> 8) & 0xff) { @@ -108,7 +105,7 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer) * Assume pass number is encoded using <5:3><2:0>. Exceptions * will be fixed later. */ - sprintf(pass, "%u.%u", ((chip_id >> 3) & 7) + 1, chip_id & 7); + sprintf(pass, "%d.%d", (int)((chip_id >> 3) & 7) + 1, (int)chip_id & 7); /* * Use the number of cores to determine the last 2 digits of @@ -116,6 +113,12 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer) * later. */ switch (num_cores) { + case 32: + core_model = "80"; + break; + case 24: + core_model = "70"; + break; case 16: core_model = "60"; break; @@ -246,8 +249,8 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer) break; case 3: /* CN58XX */ family = "58"; - /* Special case. 4 core, no crypto */ - if ((num_cores == 4) && fus_dat2.cn38xx.nocrypto) + /* Special case. 4 core, half cache (CP with half cache) */ + if ((num_cores == 4) && fus3.cn58xx.crip_1024k && !strncmp(suffix, "CP", 2)) core_model = "29"; /* Pass 1 uses different encodings for pass numbers */ @@ -285,6 +288,9 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer) suffix = "NSP"; if (fus_dat3.s.nozip) suffix = "SCP"; + + if (fus_dat3.s.bar2_en) + suffix = "NSPB2"; } if (fus3.cn56xx.crip_1024k) family = "54"; @@ -301,6 +307,60 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer) else family = "52"; break; + case 0x93: /* CN61XX */ + family = "61"; + if (fus_dat2.cn61xx.nocrypto && fus_dat2.cn61xx.dorm_crypto) + suffix = "AP"; + if (fus_dat2.cn61xx.nocrypto) + suffix = "CP"; + else if (fus_dat2.cn61xx.dorm_crypto) + suffix = "DAP"; + else if (fus_dat3.cn61xx.nozip) + suffix = "SCP"; + break; + case 0x90: /* CN63XX */ + family = "63"; + if (fus_dat3.s.l2c_crip == 2) + family = "62"; + if (num_cores == 6) /* Other core counts match generic */ + core_model = "35"; + if (fus_dat2.cn63xx.nocrypto) + suffix = "CP"; + else if (fus_dat2.cn63xx.dorm_crypto) + suffix = "DAP"; + else if (fus_dat3.cn63xx.nozip) + suffix = "SCP"; + else + suffix = "AAP"; + break; + case 0x92: /* CN66XX */ + family = "66"; + if (num_cores == 6) /* Other core counts match generic */ + core_model = "35"; + if (fus_dat2.cn66xx.nocrypto && fus_dat2.cn66xx.dorm_crypto) + suffix = "AP"; + if (fus_dat2.cn66xx.nocrypto) + suffix = "CP"; + else if (fus_dat2.cn66xx.dorm_crypto) + suffix = "DAP"; + else if (fus_dat3.cn66xx.nozip) + suffix = "SCP"; + else + suffix = "AAP"; + break; + case 0x91: /* CN68XX */ + family = "68"; + if (fus_dat2.cn68xx.nocrypto && fus_dat3.cn68xx.nozip) + suffix = "CP"; + else if (fus_dat2.cn68xx.dorm_crypto) + suffix = "DAP"; + else if (fus_dat3.cn68xx.nozip) + suffix = "SCP"; + else if (fus_dat2.cn68xx.nocrypto) + suffix = "SP"; + else + suffix = "AAP"; + break; default: family = "XX"; core_model = "XX"; @@ -310,49 +370,40 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer) } clock_mhz = octeon_get_clock_rate() / 1000000; - if (family[0] != '3') { + int fuse_base = 384 / 8; + if (family[0] == '6') + fuse_base = 832 / 8; + /* Check for model in fuses, overrides normal decode */ /* This is _not_ valid for Octeon CN3XXX models */ - fuse_data |= cvmx_fuse_read_byte(51); + fuse_data |= cvmx_fuse_read_byte(fuse_base + 3); fuse_data = fuse_data << 8; - fuse_data |= cvmx_fuse_read_byte(50); + fuse_data |= cvmx_fuse_read_byte(fuse_base + 2); fuse_data = fuse_data << 8; - fuse_data |= cvmx_fuse_read_byte(49); + fuse_data |= cvmx_fuse_read_byte(fuse_base + 1); fuse_data = fuse_data << 8; - fuse_data |= cvmx_fuse_read_byte(48); + fuse_data |= cvmx_fuse_read_byte(fuse_base); if (fuse_data & 0x7ffff) { int model = fuse_data & 0x3fff; int suffix = (fuse_data >> 14) & 0x1f; if (suffix && model) { - /* - * Have both number and suffix in - * fuses, so both - */ - sprintf(fuse_model, "%d%c", - model, 'A' + suffix - 1); + /* Have both number and suffix in fuses, so both */ + sprintf(fuse_model, "%d%c", model, 'A' + suffix - 1); core_model = ""; family = fuse_model; } else if (suffix && !model) { - /* - * Only have suffix, so add suffix to - * 'normal' model number. - */ - sprintf(fuse_model, "%s%c", core_model, - 'A' + suffix - 1); + /* Only have suffix, so add suffix to 'normal' model number */ + sprintf(fuse_model, "%s%c", core_model, 'A' + suffix - 1); core_model = fuse_model; } else { - /* - * Don't have suffix, so just use - * model from fuses. - */ + /* Don't have suffix, so just use model from fuses */ sprintf(fuse_model, "%d", model); core_model = ""; family = fuse_model; } } } - sprintf(buffer, "CN%s%sp%s-%d-%s", - family, core_model, pass, clock_mhz, suffix); + sprintf(buffer, "CN%s%sp%s-%d-%s", family, core_model, pass, clock_mhz, suffix); return buffer; } |