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authorGreg Ungerer <gerg@uclinux.org>2009-05-19 14:52:40 +1000
committerGreg Ungerer <gerg@uclinux.org>2009-09-16 09:43:51 +1000
commit04b75b10dceadf937e3707ecc3dfccf6a076fd29 (patch)
tree87965d12b8f7eb622efd1d36bebd2a7b8a26452e /arch/m68knommu/platform/5206/config.c
parentf9311f26434cea3e926f56ca2aa3e5740e962c72 (diff)
downloadblackbird-op-linux-04b75b10dceadf937e3707ecc3dfccf6a076fd29.tar.gz
blackbird-op-linux-04b75b10dceadf937e3707ecc3dfccf6a076fd29.zip
m68knommu: simplify ColdFire "timers" clock initialization
The ColdFire "timers" clock setup can be simplified. There is really no need for the flexible per-platform setup code. The clock interrupt can be hard defined per CPU platform (in CPU include files). This makes the actual timer code simpler. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu/platform/5206/config.c')
-rw-r--r--arch/m68knommu/platform/5206/config.c25
1 files changed, 11 insertions, 14 deletions
diff --git a/arch/m68knommu/platform/5206/config.c b/arch/m68knommu/platform/5206/config.c
index 0dce2383320d..c1d24796ef2f 100644
--- a/arch/m68knommu/platform/5206/config.c
+++ b/arch/m68knommu/platform/5206/config.c
@@ -68,21 +68,17 @@ static void __init m5206_uarts_init(void)
/***************************************************************************/
-void mcf_settimericr(unsigned int timer, unsigned int level)
+static void __init m5206_timers_init(void)
{
- volatile unsigned char *icrp;
- unsigned int icr, imr;
-
- if (timer <= 2) {
- switch (timer) {
- case 2: icr = MCFSIM_TIMER2ICR; imr = MCFINTC_TIMER2; break;
- default: icr = MCFSIM_TIMER1ICR; imr = MCFINTC_TIMER1; break;
- }
-
- icrp = (volatile unsigned char *) (MCF_MBAR + icr);
- *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
- mcf_clrimr(imr);
- }
+ /* Timer1 is always used as system timer */
+ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+ MCF_MBAR + MCFSIM_TIMER1ICR);
+
+#ifdef CONFIG_HIGHPROFILE
+ /* Timer2 is to be used as a high speed profile timer */
+ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+ MCF_MBAR + MCFSIM_TIMER2ICR);
+#endif
}
/***************************************************************************/
@@ -101,6 +97,7 @@ void m5206_cpu_reset(void)
void __init config_BSP(char *commandp, int size)
{
mach_reset = m5206_cpu_reset;
+ m5206_timers_init();
}
/***************************************************************************/
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