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authorGreg Ungerer <gerg@uclinux.org>2011-03-05 23:32:35 +1000
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 21:01:54 +1000
commitf317c71a2f3dcdae26055e6dd390d06c5efe5795 (patch)
tree8fa8118737363a72b4cffd13ae38d083bee9ef89 /arch/m68k/include/asm/m527xsim.h
parentcdfc243e7df1b3abba2c6aa35eba89f59b46219e (diff)
downloadblackbird-op-linux-f317c71a2f3dcdae26055e6dd390d06c5efe5795.tar.gz
blackbird-op-linux-f317c71a2f3dcdae26055e6dd390d06c5efe5795.zip
m68knommu: move ColdFire PIT timer base addresses
The PIT hardware timer module used in some ColdFire CPU's is not always addressed relative to an IPSBAR register. Parts like the ColdFire 5207 and 5208 have fixed peripheral addresses. So lets not define the register addresses of the PIT relative to an IPSBAR definition. Move the base address definitions into the per-part headers. This is a lot more consistent since all the other peripheral base addresses are defined in the per-part header files already. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m527xsim.h')
-rw-r--r--arch/m68k/include/asm/m527xsim.h11
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 3712f611bd5e..cb7df04ad0c4 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -232,15 +232,20 @@
#endif
/*
- * EPort
+ * PIT timer base addresses.
*/
+#define MCFPIT_BASE1 (MCF_IPSBAR + 0x150000)
+#define MCFPIT_BASE2 (MCF_IPSBAR + 0x160000)
+#define MCFPIT_BASE3 (MCF_IPSBAR + 0x170000)
+#define MCFPIT_BASE4 (MCF_IPSBAR + 0x180000)
+/*
+ * EPort
+ */
#define MCFEPORT_EPDDR (MCF_IPSBAR + 0x130002)
#define MCFEPORT_EPDR (MCF_IPSBAR + 0x130004)
#define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005)
-
-
/*
* GPIO pins setups to enable the UARTs.
*/
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