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authorDean Nelson <dcn@sgi.com>2005-03-23 19:46:00 -0700
committerTony Luck <tony.luck@intel.com>2005-05-03 12:16:52 -0700
commitb0d82bd5df874f7dadbeced1b0163473387da37c (patch)
treec78294ddaff17034ef77253c587a7512ba813e95 /arch/ia64/sn/kernel/xp_nofault.S
parent7fbd2a5337b2aa91266abbded97330f909904fd5 (diff)
downloadblackbird-op-linux-b0d82bd5df874f7dadbeced1b0163473387da37c.tar.gz
blackbird-op-linux-b0d82bd5df874f7dadbeced1b0163473387da37c.zip
[IA64-SGI] SGI Altix cross partition functionality (2nd
This patch contains the shim module (XP) which interfaces between the communication module (XPC) and the functional support modules (like XPNET). Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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diff --git a/arch/ia64/sn/kernel/xp_nofault.S b/arch/ia64/sn/kernel/xp_nofault.S
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+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 2004-2005 Silicon Graphics, Inc. All Rights Reserved.
+ */
+
+
+/*
+ * The xp_nofault_PIOR function takes a pointer to a remote PIO register
+ * and attempts to load and consume a value from it. This function
+ * will be registered as a nofault code block. In the event that the
+ * PIO read fails, the MCA handler will force the error to look
+ * corrected and vector to the xp_error_PIOR which will return an error.
+ *
+ * extern int xp_nofault_PIOR(void *remote_register);
+ */
+
+ .global xp_nofault_PIOR
+xp_nofault_PIOR:
+ mov r8=r0 // Stage a success return value
+ ld8.acq r9=[r32];; // PIO Read the specified register
+ adds r9=1,r9 // Add to force a consume
+ br.ret.sptk.many b0;; // Return success
+
+ .global xp_error_PIOR
+xp_error_PIOR:
+ mov r8=1 // Return value of 1
+ br.ret.sptk.many b0;; // Return failure
+
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